dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 421

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

BRCLR
Operation:
Branch if <bitfield> of destination is all zeros (no parallel move)
Description: Test all selected bits of the destination operand. If all the selected bits are clear, C is set, and program
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Note:
Freescale Semiconductor
execution continues at the location in program memory at PC + displacement. Otherwise, C is cleared,
and execution continues with the next sequential instruction. A 16-bit immediate value is used to spec-
ify which bits are tested. Those bits that are set in the immediate value are the same bits that are tested
in the destination; those bits that are cleared in the immediate value are ignored in the destination.
This instruction is useful in performing I/O flag polling.
LABEL
Prior to execution, the 16-bit X memory location X:$5000 contains the value $FF00. Execution of the
BRCLR instruction tests the state of bits 3, 5, and 6 in X:$5000 and sets the C bit (because all the mask
bits were clear). Since C is set, program execution is then transferred to the address offset from the
current program counter by the displacement that is specified in the instruction.
For destination operand SR:
For other destination operands:
L
C
If all bits in the mask are cleared, C is set, and the branch is taken.
Before Execution
X:$5000
LF
15
— Bits 14–10 of the mask operand must be cleared.
— Set if data limiting occurred during 36-bit source move
— Set if all bits specified by the mask are set
SR
P4
14
Cleared if at least 1 bit specified by the mask is not set
BRCLR
INC.W
INC.W
ADD
13
P3
P2
12
FF00
0300
MR
P1
11
#$0068,X:$5000,LABEL
A
A
B,A
Branch if Bits Clear
P0
10
Instruction Set Details
I1
9
Assembler Syntax:
I0
8
SZ
7
6
L
5
E
After Execution
X:$5000
BRCLR #<MASK8>,X:<ea>,AA
BRCLR #<MASK8>,D,AA
U
4
CCR
; next two instructions
; are bypassed
SR
N
3
2
Z
FF00
0301
V
1
C
0
BRCLR
A-77