dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 249

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
8.2.2.10
The program extension (P4–P0) bits form bits 20 through 16 of the program counter. P4 corresponds to the
MSB of the 21-bit program address, and P0 corresponds to bit 16. Bits 15–0 of the program counter are
found in the PC register.
The program extension bits are stacked by the JSR and BSR instructions for subroutines and interrupts
because the complete status register is pushed by these instructions. They are restored from the stack when
an RTS, RTSD, RTI, or RTID instruction is executed.
8.2.2.11
The loop flag (LF) bit is set when a hardware (DO or DOSLC) loop is initiated or when a value is written
under program control to the hardware stack. Reading the hardware stack or terminating a DO or DOSLC
loop causes LF to be set to the value in the OMR’s NL bit. See Section 8.2.1.8, “Nested Looping
(NL)—Bit 15.”
REP looping does not affect this bit. The LF bit is cleared during processor reset.
See Section 8.4, “Hardware Stack,” for more information on how accesses to the hardware stack affect the
value in LF.
8.2.3
The loop count register (LC) is a special 16-bit counter that specifies the number of times to repeat a
hardware loop (one that is begun with a DO, DOSLC, or REP instruction). When the last instruction in a
hardware program loop is reached, the contents of the loop counter register are tested. If the loop counter is
one, the program loop is terminated. If the loop counter is not one, it is decremented by one and the
program loop is repeated.
The loop count register can be read and written under program control. This capability gives software
programs access to the value of the current loop iteration. The LC register is also updated with the contents
of the LC2 register when a loop is exited. See Section 8.5, “Hardware Looping,” for a full discussion of
hardware looping.
8.2.4
The loop count register 2 (LC2) is a 16-bit register that is used to save the value that is in LC whenever LC
is modified, as when a nested hardware loop is begun. The contents of LC are copied to LC2 whenever a
DO instruction is executed or when an instruction is executed that explicitly modifies the LC register. This
arrangement ensures that LC is backed up properly when LC is loaded under program control, such as
Freescale Semiconductor
Loop Count Register
Loop Count Register 2
Program Counter Extension (P0–P4)—Bits 10–14
Loop Flag (LF)—Bit 15
Because these bits represent part of the program counter, they cannot be
directly modified. Instructions that change the value of the status register
do not affect these bits.
The values read (from reading the SR) are not guaranteed to be valid.
This bit should never be explicitly cleared by a move or bitfield instruction
when the NL bit in the OMR register is set.
Program Controller
NOTE:
NOTE:
NOTE:
Program Controller Programming Model
8-11

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