dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 168

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Data Arithmetic Logic Unit
5.3.4.1
This general-purpose algorithm generates both a correct quotient and a correct remainder when dividing
any combination of positive or negative, two’s-complement, signed values. Because this algorithm handles
the most general case, it is the slowest and uses the most resources. Example 5-15 presents one algorithm
for division with fractional numbers and another algorithm for the division of integer numbers.
; Four-Quadrant Division of Fractional, Signed Data (B1:B0 / X0)
; Generates Signed quotient and remainder
; Setup
; Division
; Correct quotient
QDONE
DONE
; Four-Quadrant Division of Integer, Signed Data (B1:B0 / X0)
; Generates Signed quotient and remainder
; Setup
;Division
; Correct quotient
QDONE
DONE
5-22
MOVE.W
MOVEU.W
ABS
EOR
BFCLR
REP
DIV
TFR
BGE
NEG
MOVE.W
MOVE.W
ABS
ADD
BRCLR
MOVE.W
NEG
ASL
MOVE.W
MOVEU.W
ABS
EOR
BFCLR
REP
DIV
TFR
BGE
NEG
MOVE.W
MOVE.W
ABS
ADD
BRCLR
MOVE.W
NEG
ASR
General-Purpose Four-Quadrant Division
B1,A
B1,N
B
X0,Y1
#$0001,SR
16
X0,B
B,A
QDONE
B
A0,Y1
X0,A
A
B,A
#$8000,N,DONE
#0,A0
A
B
B1,A
B1,N
B
X0,Y1
#$0001,SR
16
X0,B
B,A
QDONE
B
A0,Y1
X0,A
A
B,A
#$8000,N,DONE
#0,A0
A
B
Example 5-15. Signed Division with Remainder
DSP56800E Core Reference Manual
; Save sign bit of dividend (B1) in MSB of A1
; Save sign bit of dividend (B1) in MSB of N
; Force dividend positive
; Save sign bit of quotient in N bit of SR
; Clear carry bit: required for 1st DIV instr
; If correct result is positive, then done
; Else negate to get correct negative result
; Y1 <- True quotient
; A <- Signed divisor
; A <- Absolute value of divisor
; A1 <- Restored remainder
; (At this point, the correctly signed quotient
; is in Y1 and the correct remainder is in A1)
; Shift of dividend required for integer
; division
; Save sign bit of dividend (B1) in MSB of A1
; Save sign bit of dividend (B1) in MSB of N
; Force dividend positive
; Save sign bit of quotient in N bit of SR
; Clear carry bit: required for 1st DIV instr
; If correct result is positive, then done
; Else negate to get correct negative result
; Y1 <- True quotient
; A <- Signed divisor
; A <- Absolute Value of divisor
; A1 <- Restored remainder
; Shift required for correct integer remainder
; (At this point, signed quotient in Y1, correct
; remainder in A1)
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