dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 346

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Table A-2 on page A-3 shows the registers that are available for use as pointers in address-register-indirect
addressing modes. The most common fields that are used in this table are Rn and RRR. This table also
shows the notation that is used for AGU registers in AGU arithmetic operations.
A-2
Register Field
(destination)
(destination)
(destination)
(destination)
(source)
(source)
(source)
HHHH.L
(source)
HHHH.L
HHH.L
HHH.L
HHHH
HHHH
HHH
HHH
Table A-1. Register Fields for General-Purpose Writes and Reads
A10, B10, C10, D10
A10, B10, C10, D10
Registers in this
A1, B1, C1, D1
A1, B1, C1, D1
X0, Y0, Y1
X0, Y0, Y1
X0, Y0, Y1
X0, Y0, Y1
A, B, C, D
A, B, C, D
A, B, C, D
R0–R5, N
R0–R5, N
R0–R5, N
A, B, C, D
R0–R5, N
Field
Y
Y
Y
Y
Y
Y
DSP56800E Core Reference Manual
Seven data ALU registers—four 16-bit MSP portions of the accumula-
tors and three 16-bit data registers that are used as source registers.
Note the usage of A1, B1, C1, and D1.
This field is identical to the FFF1 field.
Seven data ALU registers—four 16-bit MSP portions of the accumula-
tors and three 16-bit data registers that are used as destination regis-
ters. Note the usage of A, B, C, and D. Writing word data to the 32-bit Y
register clears the Y0 portion.
Five data ALU registers—four 32-bit MSP:LSP portions of the accumu-
lators and one 32-bit Y data register (Y1:Y0) that is used as a source
register.
Used for long memory accesses.
Five data ALU registers—four 32-bit MSP:LSP portions of the accumu-
lators and one 32-bit Y data register (Y1:Y0) that is used as a destina-
tion register.
Used for long memory accesses.
Seven data ALU and seven AGU registers that are used as source reg-
isters. Note the usage of A1, B1, C1, and D1.
Seven data ALU and seven AGU registers that are used as destination
registers. Note the usage of A, B, C, and D. Writing word data to the
32-bit Y register clears the Y0 portion.
Five data ALU and seven AGU registers that are used as source regis-
ters.
Used for long memory accesses. Also see dddd.L.
Five data ALU and seven AGU registers that are used as destination
registers.
Used for long memory accesses. Also see dddd.L.
Comments
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