dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 447

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

CMP.L
Operation:
D – S
Description: Compare 32-bit portions of two registers, a register and a long word in memory, or a register and a
Usage:
Note:
Example:
Explanation of Example:
Condition Codes Affected:
Freescale Semiconductor
Before Execution
A2
0
(no parallel move)
16-bit immediate value (sign extended to 32 bits). The two operands are subtracted to perform the com-
parison, and the CCR is updated accordingly. The result of the subtraction operation is not stored. The
result is not affected by the state of the saturation bit (SA).
This instruction can be used for both integer and fractional two’s-complement data.
This instruction subtracts 32-bit operands. All values are sign extended internally to 36 bits before the
comparison.
CMP.L
Prior to execution, the 36-bit A accumulator contains the value $0:0020:0000. Execution of the
CMP.L Y,A instruction automatically sign extends both operands to 36 bits and then subtracts the Y
register from the accumulator. The CCR is updated based on the result of the 32-bit comparison; both
registers are unchanged.
E
U
N
Z
V
C
LF
15
— Set if the extension portion of the 36-bit result is in use
— Set if the 36-bit result is not normalized
— Set if bit 31 of the result is set
— Set if result equals zero
— Set if overflow has occurred in result
— Set if a carry (or borrow) occurs from bit 31 of the result
0020
0024
P4
14
A1
Y1
Y,A
13
P3
SR
P2
12
MR
P1
11
0000
0000
0300
A0
Y0
P0
10
Instruction Set Details
Compare Long
; 32-bit compare of Y and A
I1
9
Assembler Syntax:
CMP.L
I0
8
SZ
7
After Execution
6
L
A2
0
5
E
S,D
U
4
CCR
0020
0024
A1
Y1
N
3
(no parallel move)
SR
2
Z
V
1
0000
0000
0319
C
0
A0
Y0
CMP.L
A-103