dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 308

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Instruction Pipeline
10.4.2
Dependencies that are similar to those presented for the data ALU can occur with the address generation
unit, affecting the execution of a sequence of instructions. Many pipeline dependencies are caused by the
fact that addresses are issued early in the pipeline (AG stage), while registers are written deeper within the
pipe (EX stage).
The most frequently occurring dependencies take place when an AGU register (R0–R5, N, or SP) is
modified using a move or bit-manipulation instruction. A dependency occurs if the same register is used
within the next 2 immediately following instruction cycles and if it is:
When these conditions occur, a hardware interlock occurs and the DSC automatically stalls the pipeline
1 or 2 cycles. This AGU dependency is demonstrated in Example 10-5.
A pipeline interlock occurs between n1 and n2 because the address for the MOVE.W instruction (n2) is
formed at the Address Generation stage of the pipeline, which would normally occur at cycle #6 for n2 in
Table 10-6 on page 10-29. The MOVE.L instruction (n1), however, updates the R0 register very deep in
the pipeline—at cycle #7. Because the R0 register is available for use in cycle #8, interlocking hardware on
the core automatically stalls the core for 2 cycles.
10-28
Pipeline Stage
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OP2
EX2
AG
EX
P1
P2
ID
IF
used as a pointer in an addressing mode.
used as an offset in an addressing mode.
used as an operand in an AGU calculation.
used in a TFRA instruction.
AGU Pipeline Dependencies
MOVE.L
MOVE.W
ADD
mac
1
Example 10-5. Pipeline Dependency with AGU Registers
Table 10-5. Data ALU Pipeline with No Dependencies
A10,R0
X:(R0),X0
X0,B
mac
sub
2
mac
sub
asl
3
DSP56800E Core Reference Manual
mac
sub
tfra
asl
4
mov
mac
sub
tfra
asl
5
; n1: Write AGU pointer register
; n2: Use same register as an address
; n3: Use value in x0 just read from memory
mov
mac
add
sub
tfra
asl
6
Instruction Cycle
mov
mac
add
sub
tfra
asl
7
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mov
mac
add
tfra
asl
—
8
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mov
add
sub
—
—
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mov
add
asl
10
—
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Freescale Semiconductor
mov
add
11
—
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add
—
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