dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 453

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
CMPA
Operation:
D – S
Description: Compare two AGU address registers by subtracting the source from the destination, and update the
Example:
Explanation of Example:
Condition Codes Affected:
Instruction Fields:
Instruction Opcodes:
Timing:
Memory:
Freescale Semiconductor
CMPA
Operation
CMPA
Before Execution
Rn,Rn
R0
R1
(no parallel move)
CCR based on the result of the subtraction. The result of the subtraction operation is not stored.
CMPA
Prior to execution, the R0 register contains the value $082473, R1 contains the value $002473, and the
status register (SR) contains $0300. Execution of the CMPA R0,R1 instruction subtracts R0 from R1
and updates the CCR, leaving the registers unchanged.
N
Z
V
C
1 oscillator clock cycle
1 program word
LF
SR
15
— Set if bit 23 of the result is set
— Set if result equals zero
— Set if overflow has occurred in result
— Set if a borrow occurs from bit 23 of the result
P4
14
Operands
082473
002473
R0,R1
Rn,Rn
13
P3
0300
P2
12
MR
Compare AGU Registers
P1
11
15
P0
1
10
C
1
Instruction Set Details
0
; compare R0 and R1
I1
W
9
1
0
Assembler Syntax:
CMPA
24-bit compare between two AGU registers
I0
8
12
0
SZ
7
11
1
After Execution
6
L
R0
R1
1
5
E
1
SR
S,D
U
4
CCR
1
8
082473
002473
Comments
N
3
7
n
(no parallel move)
0309
0
2
Z
1
V
1
n
4
C
0
R
3
CMPA
n
R
A-109
R
0

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