dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 470

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

DO
Operation:
HWS0 → HWS1;
LC → LC2
LA → LA2
LF → NL
PC → HWS0
S → LC
D → LA
1 → LF
Operation When Loop Completes (End-of-Loop Processing):
If NL == 1
HWS1 → HWS0
NL → LF
0 → NL
Description: Begin a hardware DO loop that is to be repeated for the number of times specified in the instruction’s
Example 1:
Explanation of Example:
A-126
LC2 → LC, LA2 → LA
source operand, and whose range of execution is terminated by the destination operand. The source
operand specifies the loop count and can be either an immediate 6-bit unsigned value or an on-chip
register value, and the destination operand is a 16- or 21-bit absolute address. No overhead other than
the execution of the DO instruction is required to set up this loop. When a DO loop is executed, the
instructions are actually fetched each time through the loop. Therefore, a DO loop can be interrupted.
The DO instruction performs hardware looping on a single instruction or a block of instructions. DO
loops can be nested up to two deep, accelerating more complex algorithms.
END_CPY
This example copies a block of forty 32-bit memory locations from one area of memory to another.
When a hardware DO loop is initiated, the following events occur:
1.
2.
3.
Instructions in the loop are then executed. The address of each instruction is compared to the value in
LA to see if it is the last instruction in the loop. When the end of the loop is reached, the loop count
register is checked to see if the loop should be repeated. If the value in LC is greater than one, LC is
decremented and the loop is re-started from the top. If LC is equal to one, the loop has been executed
for the proper number of times and should be exited.
When a hardware loop ends, the hardware stack is popped (and the popped value is discarded), the LA2
register is copied to LA, the LC2 register is copied to LC, and the NL bit in the operating mode register
is copied to the LF bit. Instruction execution then continues at the address that immediately follows the
end-of-loop address.
When the DO instruction is executed, the contents of the LC register are copied to the LC2
register, and LC is loaded with the loop count that the instruction specifies.
The old contents of the LA register are copied to the LA2 register, and the LA register is
loaded with the address of the last instruction word in the loop. If a 16-bit address is
specified, the upper 8 bits of LA are cleared.
The address of the first instruction in the program loop (top-of-loop address) is pushed onto
the hardware stack. This push sets the LF bit and updates the NL bit, as occurs with any
hardware stack push.
DO
MOVE.L
MOVE.L
DSP56800E Core Reference Manual
Start Hardware DO Loop
#40,END_CPY ; Set up hardware DO loop
X:(R0)+,A
A10,X:(R1)+ ;
DO
Assembler Syntax:
; Copy a 32-bit memory location
S,D
Freescale Semiconductor
DO