dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 223

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Modulo addressing also requires that any immediate values or AGU registers (see Section 6.8.4, “Base
Pointer and Offset Values in Modulo Instructions,” on page 6-26) used as offset values are subject to this
same constraint. On Example 6-9, the correct usage of offset values is demonstrated.
BUFF_SIZE EQU
; Initialization
; Modulo Arithmetic works correctly for the following instructions:
6.8.5
Depending on the size of the memory values that are being accessed when modulo arithmetic is enabled,
different addressing modes and instructions are supported.
6.8.5.1
The DSP56800E core’s address generation unit supports modulo arithmetic for the following
address-register-indirect modes when Rn is R0 or R1:
Modulo arithmetic can also be programmed for both the R0 and the R1 pointers, as shown in Section 6.8.3,
“Configuring Modulo Arithmetic.”
6.8.5.2
Modulo arithmetic is also supported for both byte and long memory accesses. When byte pointers are used,
the following addressing modes support modulo address arithmetic, where Rn is R0 or R1:
The addressing modes that support modulo arithmetic for byte accesses when word pointers are used are
more limited:
Freescale Semiconductor
Supported Memory Access Instructions
(Rn)
(Rn+N)
(Rn+xxxx)
(Rn+x)
(Rn)
(Rn)–
MOVEU.W
MOVE.L
MOVE.W
TFRA
MOVE.W
MOVE.W
MOVE.W
MOVE.W
ADDA
SUBA
Modulo Addressing for Word Memory Accesses
Modulo Addressing for Byte and Long Memory Accesses
Example 6-9. Correct Usage - Offset Values Satisfying Restriction
64
#BUFF_SIZE-1,M01; Modulo Enabled, buffer size = 64
#$008000,R0
#50,N
N,R4
X:(R0+N),X0
X:(R0)+N,X0
X:(R0+50),X0 ; offset is 50
X:(R0-50),X0 ; offset is -50
R4,R0
N,R0
(Rn)+
(Rn)+N
(Rn+xxxxxx)
(Rn+N)
(Rn+xxxx)
(Rn+xxxx)
Address Generation Unit
; Buffer Size
; Base Pointer for modulo buffer
; Offset register - Note: offset <= BUFF_SIZE
; Offset register - another copy
; offset in N
; offset in N
; offset in R4
; offset in N
Linear and Modulo Address Arithmetic
(Rn)–
(Rn+x)
(Rn)+
(Rn+xxxxxx)
(Rn+xxxxxx)
6-29