dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 370
dsp56800e
Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800E.pdf
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ADDA.L
Operation:
(S << 1) + D → D
S1 + (S2 << 1) → D (no parallel move)
Description: Left shift one of the source operands by one (S or S2), and add it either to the destination or to the other
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
A-26
Before Execution
R0
R1
source operand (S1). Store the result in the destination AGU register (D).
The ADDA.L instruction is most useful for accessing arrays of long words in memory. The address of
an element in the array is calculated by adding the base address to the index value multiplied by 2
(since long words occupy 2 words in memory). The ADDA.L instruction can accomplish this in one
step.
ADDA.L #$4000,R0,R1
The address pointer register R0 initially contains $000044, while R1 initially contains $000624. When
the ADDA.L #$4000,R0,R1 instruction is executed, R0 is internally shifted 1 bit to the left, result-
ing in the intermediate value $000088. The immediate value $4000 is then added to the shifted value,
and the result ($004088) is stored in address register R1.
The condition codes are not affected by this instruction.
(no parallel move)
000044
000624
Add to Left-Shifted AGU Register
DSP56800E Core Reference Manual
; add $4000 to left-shifted R0 and store the
; result in R1
Assembler Syntax:
ADDA.L
ADDA.L
After Execution
R0
R1
S,D
S1,S2,D (no parallel move)
000044
004088
(no parallel move)
Freescale Semiconductor
ADDA.L
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