dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 611

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
SUB
Example 2:
Explanation of Example:
Condition Codes Affected:
Instruction Fields:
Freescale Semiconductor
Operation
SUB
Before Execution
A2
4
SUB
Prior to execution, the 16-bit Y0 register contains the negative value $8003, and the 36-bit A accumu-
lator contains the value $4:8058:1234. Since the destination is a 16-bit register, the value in A1 is first
sign extended before being subtracted from Y0. The operation generates a 16-bit negative result in Y0
(setting the N bit in the CCR). The C bit is set because a borrow took place and the result is unnormal-
ized.
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
E
U
N
Z
V
C
LF
15
— Set if limiting (parallel move) or overflow has occurred in result
— Set if the extended portion of the result is in use
— Set if the result is unnormalized
— Set if the high-order bit of the result is set
— Set if the result equals zero
— Set if overflow has occurred in the result
— Set if a borrow occurs from the high-order bit of the result
8058
2000
P4
14
A1
Y1
A,Y0
13
P3
Operands
FFF,FFF
SR
P2
12
MR
P1
11
1234
8003
0300
A0
Y0
P0
10
Instruction Set Details
I1
9
; 16-bit subtract
Subtract
C
1
I0
8
W
1
SZ
7
36-bit subtract two registers.
After Execution
6
L
A2
4
5
E
U
4
CCR
8058
2000
A1
Y1
N
3
Comments
SR
2
Z
V
1
FFAB
1234
0319
C
0
A0
Y0
SUB
A-267

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