dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 702

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
R
R, see rounding bit (R)
R0–R5, see address registers (R0–R5)
real-time debugging 1-2, 2-1, 11-1
receive register 11-8
register notation 4-16, 5-4, A-1
register-to-register moves 4-27, 4-50
REP instruction 4-8, 4-14, 4-47, 8-18, 8-22, 9-10,
repeat (REP) looping 8-7, 8-18
reset processing state 9-1, 9-3, 11-6
RND instruction 4-4, 4-35, 4-48, 5-43, 8-6,
ROL.L instruction 4-5, 4-14, 4-39, A-247 to A-248
ROL.W instruction 4-5, 4-14, 4-39, A-249
ROR.L instruction 4-5, 4-14, 4-39, A-251
ROR.W instruction 4-5, 4-14, 4-39, A-253
rounding 5-5, 5-43
rounding bit (R) 8-6
RTI instruction 4-10, 4-14, 4-45, 8-11, 8-15, 9-6,
RTID instruction 4-10, 4-13 to 4-14, 4-46, 8-11, 8-15,
RTS instruction 4-10, 4-14, 4-46, 8-11, 8-15, A-258
RTSD instruction 4-10, 4-13 to 4-14, 4-46, 8-11,
S
SA, see saturation bit (SA)
SAT instruction 4-4, 4-12, 4-35, 4-48, A-261 to A-262
saturation 5-5 to 5-6, 5-39, 8-6
saturation bit (SA) 8-6
SBC instruction 4-4, 4-14, 4-35, A-263
SD, see stop delay bit (SD)
secondary data address bus (XAB2) 2-7
secondary read offset register (N3), see offset registers
secondary X data bus (XDB2) 2-7
shadow registers 6-5
shifting instructions 4-5, 4-38, 5-25
signal processing
signed data
signed division 5-22 to 5-23
signed multiplication 5-33 to 5-34
single parallel moves 3-11 to 3-12, 4-48
Index-vi
entering 9-1
exiting 9-2
convergent 5-43 to 5-44, 8-6
two’s-complement 5-43, 5-46, 8-6
analog 1-5
digital 1-5
fractional 3-6
integer 3-6
10-3, 10-23, A-242
A-245 to A-246
A-255
9-6, 10-9, A-256
A-259
(N and N3)
DSP56800E Core Reference Manual
size bit (SZ) 8-10
software stack 6-4, 8-14 to 8-16
SP, see stack pointer register (SP)
SR, see status register (SR)
stack frame 8-16
stack pointer register (SP) 2-9, 3-18, 6-3 to 6-4, 8-12,
status register (SR) 2-9, 8-4, 8-7, 8-12, 8-25 to 8-26,
sticky bit 8-10, B-5
stop delay bit (SD) 8-6
STOP instruction 4-9 to 4-10, 4-14, 4-47, 9-12, 10-23,
stop mode 8-6
stop processing state 9-1, 9-12, 11-6
SUB instruction 4-4, 4-35, 4-48 to 4-49, A-266
SUB.B instruction 4-4, 4-35, A-270 to A-271
SUB.BP instruction 4-4, 4-35, A-272
SUB.L instruction 4-4, 4-36, A-274
SUB.W instruction 4-4, 4-36, A-276
SUBA instruction 4-7, 4-42, A-278
SUBL instruction 4-4, 4-48, A-279
subroutines 8-15 to 8-16
subtract with carry 4-35
subtraction 5-16
SWAP instruction 4-4, 4-14, 4-27, 6-5, A-280
SWI #x instruction 4-10, 4-14, 9-10
SWI instruction 4-10, 4-14, 4-47, 9-4, 9-9, 10-11,
SWILP instruction 4-10, 4-14, 4-47, 9-3, 9-10, A-282
SXT.B instruction 4-4, 4-12, 4-36, A-283
SXT.L instruction 4-4, 4-12, 4-36, A-284
SXTA.B instruction 4-7, 4-42, A-285
SXTA.W instruction 4-7, 4-42, A-286
SZ, see size bit (SZ)
T
TAP controller 11-30
TAP, see Joint Test Action Group (JTAG)
Tcc instruction 4-4, 4-14, 4-27, 9-11, A-287
test access port (TAP), see Joint Test Action Group
TFR instruction 4-4, 4-36, 4-48 to 4-49, A-290, A-292
carry bit (C) 8-9, B-7
extension in use bit (E) 8-10, B-6
interrupt mask bits (I1 and I0) 8-10
limit bit (L) 8-10, B-5
loop flag bit (LF) 8-11
negative bit (N) 8-9, B-6
overflow bit (V) 8-9, B-7
program counter extension bits (P4–P0) 8-11
size bit (SZ) 8-10, B-5
unnormalized bit (U) 8-9, B-6
zero bit (Z) 8-9, B-7
8-17
9-2, 9-11, 10-24
A-265
A-281
(JTAG)
Freescale Semiconductor

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