dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 675

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

A.3.7
A number of DSP56800E instructions specify one operand using an immediate value or absolute address.
These values are encoded into the instruction using the following encoding fields:
Freescale Semiconductor
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AAAAAA: 6-bit positive offset for X:(R2+xx) addressing mode. Allows positive offsets: 0 to 63.
AAA: Top 3 address bits for 19-bit JMP, Jcc, and JSR instructions.
AA: Top 2 address bits for 18-bit BRA, Bcc, and BSR instructions.
Aaaaaaa: 7-bit signed offset for Bcc <OFFSET> and BRSET and BRCLR instructions. The U bit
in BRSET and BRCLR instructions is used to indicate if the mask corresponds to the upper byte
(U = 1) or the lower byte (U = 0). Aaaaaaa must never be all zeros when it is used with the Bcc
instruction.
aaaaaa: 6-bit negative offset for the X:(SP–xx) addressing mode. Allows negative offsets from –1
to –64.
BBBBBBB: 7-bit signed integer that is used by an instruction whose operands are of the form
“#<xx>,hhhh” or “#<xx>,F1”.
BBBBBB: 6-bit unsigned integer that is used for DO and REP instructions. BBBBBB cannot be
zero for DO loops.
Immediate and Absolute Address Encoding
Encoding Field
Table A-18. Condition Encoding for Jump and Branch Instructions
CCCC
Instruction Set Details
Value
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
cs (same as lo—unsigned lower)
ls (unsigned lower or same)
cc (same as hs—unsigned
hi (unsigned higher)
higher or same)
(Reserved)
Condition
ne
eq
ge
nn
gt
nr
le
lt
A-331