dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 378

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

ASL
Operation:
(see following figure)
:
Description: Arithmetically shift the destination operand (D) 1 bit to the left, and store the result in the destination.
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
A-34
Before Execution
A2
A
The MSB of the destination prior to the execution of the instruction is shifted into C, and a zero is shift-
ed into the LSB of the destination. If the destination is the Y register, the MSB is bit 31. A duplicate
destination is not allowed when ASL is used in conjunction with a parallel read. For arithmetic shifts
left on 16-bit registers, refer to ASL.W.
This instruction can be used to cast a long to an integer value.
ASL
Prior to execution, the 36-bit A accumulator contains the value $A:0111:0222. Execution of the ASL
instruction shifts the 36-bit value in the A accumulator 1 bit to the left and stores the result back in the
A accumulator. C is set by the operation because bit 35 of A was set prior to the execution of the in-
struction. The V bit of CCR (bit 1) is also set because bit 35 of A has changed during the execution of
the instruction. The U bit of CCR (bit 4) is set because the result is not normalized, the E bit of CCR
(bit 5) is set because the extension portion of the result is in use, and the L bit of CCR (bit 6) is set
because an overflow has occurred. A new value for register Y0 is read and address register R3 is up-
dated by the contents on index register N.
SZ — Set according to the standard definition of SZ (parallel move)
L
E
U
N
Z
V
C
C
LF
15
— Set if limiting (parallel move) or overflow has occurred in result
— Set if the extension portion of accumulator result is in use
— Set according to the standard definition of the U bit
— Set if bit 35 of accumulator result is set
— Set if accumulator result equals zero
— Set if bit 35 of accumulator result is changed due to left shift
— Set if bit 35 of accumulator was set prior to the execution of the instruction
0111
P4
14
A1
A
D2
13
P3
SR
P2
12
MR
DSP56800E Core Reference Manual
P1
11
X:(R3)+N,Y0; shift A left by 1, update R3 and Y0
D1
0222
0300
Arithmetic Shift Left
A0
P0
10
I1
9
ASL
Assembler Syntax:
ASL
ASL
I0
8
D0
SZ
7
After Execution
6
L
A2
4
5
E
D
D
D
U
4
CCR
0222
0
A1
N
3
(no parallel move)
(one parallel move)
(two parallel reads)
SR
2
Z
Freescale Semiconductor
V
1
0444
0373
C
0
A0
ASL