dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 190

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Data Arithmetic Logic Unit
5.9.1
Convergent rounding, also called “round to the nearest even number,” is the default rounding mode. For
most values, this mode and two’s-complement rounding round identically. They only differ when the least
significant 16 bits of the final result before rounding are exactly $8000. In this case, convergent rounding
rounds down the value if the number is even (bit 16 equals zero) and rounds up the value if it is odd (bit 16
equals one).
The algorithm for convergent rounding is as follows:
Figure 5-28 on page 5-45 shows the four possible cases for convergent rounding a number in one of the
four accumulators.
5-44
1. Add the value $0:0000:8000 to the accumulator (for the RND instruction) or to the final
2. If the 16 LSBs of the result at this point are $0000, then clear bit 16 of the result.
3. If the SA bit in the OMR is set and the accumulator extension is in use:
4. Clear the LSP of the result before writing to a destination accumulator.
result without rounding (for the MACR instruction).
— Saturate to $0:7FFF:0000 if positive.
— Saturate to $F:8000:0000 if negative.
Convergent Rounding
DSP56800E Core Reference Manual
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