dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 454

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
CMPA.W
Operation:
D – S
Description: Compare the low-order 16 bits of two AGU address registers by subtracting the source from the des-
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Instruction Fields:
Instruction Opcodes:
Timing:
Memory:
A-110
CMPA.W Rn,Rn
Operation
CMPA.W
Before Execution
R0
R1
(no parallel move)
tination, and update the CCR based on the result of the subtraction. The result of the subtraction oper-
ation is not stored.
This instruction is provided for compatibility with the DSP56800 CMPA instruction, and it should be
used when only 16-bit address comparisons are required.
CMPA.W R0,R1
Prior to execution, the R0 register contains the value $082473, R1 contains the value $002473, and the
status register (SR) contains $0300. Execution of the CMPA.W R0,R1 instruction subtracts the
low-order 16 bits of R0 from the low-order 16 bits of R1 and updates the CCR, leaving the registers
unchanged. In this case, both address registers are considered equal.
N
Z
V
C
1 oscillator clock cycle
1 program word
LF
SR
15
— Set if bit 15 of the result is set
— Set if result equals zero
— Set if overflow has occurred in result
— Set if a borrow occurs from bit 15 of the subtraction
P4
14
Operands
082473
002473
Rn,Rn
13
P3
0300
Compare AGU Registers (Word)
P2
12
MR
DSP56800E Core Reference Manual
P1
11
15
C
P0
1
1
10
0
W
; compare R0 and R1
I1
1
9
0
16-bit compare between two AGU registers
Assembler Syntax:
CMPA.W
I0
8
12
0
SZ
7
11
1
After Execution
6
L
R0
R1
1
5
E
1
SR
S,D
U
4
CCR
0
8
082473
002473
Comments
N
3
7
n
(no parallel move)
0304
0
2
Z
Freescale Semiconductor
1
V
1
CMPA.W
n
4
C
0
R
3
n
R
R
0

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