dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 625

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

SWI
Operation:
Begin SWI exception processing
Description: Suspend normal instruction execution, and begin SWI exception processing if #x > the current inter-
Example:
Explanation of Example:
Restrictions:
Condition Codes Affected:
Instruction Fields:
Instruction Opcodes:
Timing:
Memory:
Freescale Semiconductor
SWI
SWI #0
SWI #1
SWI #2
Operation
SWI
SWI
rupt priority level. The interrupt priority level, which is specified by the I1 and I0 bits in the SR, is set
to (#x + 1) when the interrupt service routine is entered. If no operand is specified, priority level 3
(highest, non-maskable) is assumed.
SWI
The SWI instruction suspends normal instruction execution and initiates SWI exception processing.
A SWI instruction cannot be repeated using the REP instruction.
The condition codes are not affected by this instruction.
1 or 4 oscillator clock cycle(s)—see “Instruction Fields”
1 program word
Operands
#<0–2>
C
1
4
W
1
1
Software Interrupt
15
15
15
15
1
1
1
1
Instruction Set Details
Request interrupt servicing at interrupt priority level 0, 1, or 2 as spec-
ified by the instruction parameter
Execute the trap exception at the highest interrupt priority level, level
3 (non-maskable)
1
1
1
1
; begin SWI exception processing
1
1
1
1
Assembler Syntax:
SWI
SWI
12
12
12
12
0
0
0
0
11
11
11
11
0
0
0
0
1
1
1
1
1
1
1
1
#x
Comments
0
0
0
0
8
8
8
8
7
0
7
0
7
0
7
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
4
4
0
0
0
0
3
3
3
3
0
0
0
0
SWI
1
0
0
1
A-281
1
0
1
0
0
0
0
0