dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 336

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

JTAG and Enhanced On-Chip Emulation (Enhanced OnCE)
11.4.4.3.5
If additional counter bits are needed, the Capture Counter can also be cascaded with the 24-bit step counter
to provide 40-bit counting operations. This configuration is illustrated in Figure 11-12.
This configuration also uses the Start-Stop triggers listed in Table 11-8, where the Breakpoint Unit can use
any of the configurations in Table 11-9 and Table 11-10.
11.4.4.3.6
The actions supported by this configuration are the same as those listed in Table 11-11.
11.4.4.4
The Trace Buffer is used to the change-of-flows selected by the user. Separate control bits are available for
the following five cases, allowing any combination of these to be selected by the user:
11-24
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•
•
•
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Interrupts—captures the address of the interrupt vector and target address of RTI and FRTID
Subroutines—captures target address of JSR and BSR instructions
Change-of-Flow Not Taken —captures target address of Bcc, Jcc, BRSET, BRCLR instructions
Change-of-Flow Case 0 —captures target address of Jcc or forward branches of Bcc, BRSET,
BRCLR instructions
Change-of-Flow Case 1 —captures the target address of backward branches of Bcc, BRSET,
BRCLR instructions
Programmable Trace Buffer
40-Bit Capture Counter (Cascaded)
Actions for 40-Bit Capture Counter (Cascaded)
Figure 11-13. Capture Counter — 40-bit Configuration (Cascaded)
Clocks w/o Wait States
Instructions Executed
Clocks
DSP56800E Core Reference Manual
MUX
Start
Start
16-Bit Breakpoint
Counter
Status
Bits
24-Bit Breakpoint
Interrupt
Counter
Counter
Select
Action
Stop
Core
Halt
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