dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 113

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Table 4-16 shows the register sets that are available for use for pointers in address-register-indirect
addressing modes. The most commonly used fields in this table are Rn and RRR. This table also shows the
notation that is used for AGU registers in AGU arithmetic operations.
Freescale Semiconductor
Register Field
Register Field
(destination)
(destination)
(destination)
(destination)
(source)
(source)
HHHH.L
(source)
HHHH.L
HHH.L
HHH.L
HHHH
HHHH
HHH
RRR
Rn
N3
Rj
Table 4-15. Register Fields for General-Purpose Writes and Reads (Continued)
A10, B10, C10, D10
A10, B10, C10, D10
Registers in This
Registers in This
A1, B1, C1, D1
R0, R1, R2, R3
X0, Y0, Y1
X0, Y0, Y1
X0, Y0, Y1
A, B, C, D
A, B, C, D
R0–R5, N
A, B, C, D
R0–R5, N
R0–R5, N
A, B, C, D
R0–R5, N
Table 4-16. Address Generation Unit (AGU) Registers
R0–R5
R0–R5
Field
Field
SP
N3
Y
Y
Y
Y
Y
Y
N
N
Instruction Set Introduction
Seven data ALU registers—four 16-bit MSP portions of the accumula-
tors and three 16-bit data registers used as destination registers. Note
the usage of A, B, C, and D. Writing word data to the 32-bit Y register
clears the Y0 portion.
Five data ALU registers—four 32-bit MSP:LSP portions of the accumu-
lators and one 32-bit Y data register (Y1:Y0) used as source register.
Used for long memory accesses.
Five data ALU registers—four 32-bit MSP:LSP portions of the accumu-
lators and one 32-bit Y data register (Y1:Y0) used as destination regis-
ter.
Used for long memory accesses.
Seven data ALU and seven AGU registers used as source registers.
Note the usage of A1, B1, C1, and D1.
Seven data ALU and seven AGU registers used as destination regis-
ters. Note the usage of A, B, C, and D. Writing word data to the 32-bit Y
register clears the Y0 portion.
Five data ALU and seven AGU registers used as source registers.
Used for long memory accesses. Also see dddd.L.
Five data ALU and seven AGU registers used as destination registers.
Used for long memory accesses. Also see dddd.L.
Eight AGU registers available as pointers for addressing and address
calculations
Seven AGU registers available as pointers for addressing and as
sources and destinations for move instructions
Four pointer registers available as pointers for addressing
One index register available only for the second access in dual parallel
read instructions
Comments
Comments
Instruction Set Summary
4-17