dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 197

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Calculations in the primary address arithmetic unit can be performed using either linear arithmetic, for
general-purpose computing, or modulo arithmetic, for circular buffers and other useful data structures. The
contents of the modifier register, M01, specify the type of arithmetic to be performed for the R0 and R1
address registers. All other address registers—R2–R5, N, and SP—always operate with linear arithmetic.
Modulo arithmetic is described in detail in Section 6.8, “Linear and Modulo Address Arithmetic.”
6.1.2
The secondary address adder unit is used for address update calculations on the R3 register, which is used
for the secondary read in dual memory read instructions (see Figure 6-2 on page 6-2). The adder unit can
increment, decrement, or add the contents of the N3 register to R3. This unit performs only linear
arithmetic; modulo arithmetic is not supported.
6.1.3
Two single-bit shifters are present to support byte addressing. More information on byte addressing, and
on the shift operations that are performed on byte addresses, can be found in Section 3.5, “Memory Access
and Pointers,” on page 3-17.
6.2
The AGU programming model, which Figure 6-3 on page 6-4 illustrates, consists of 14 programmable
registers:
The eight 24-bit registers can be used as pointers in the register-indirect addressing modes. The N register
can also be used as an index or offset by the six address pointer registers. Modulo arithmetic on the R0 and
R1 pointer registers is enabled with the M01 register. The R0, R1, N, and M01 registers are shadowed,
providing extra pointer registers for interrupt routines or for system-control software.
Although all of the address pointer registers and the SP are available for most addressing modes, there are
some addressing modes that only work with a specific address pointer register. These special cases appear
in Table 6-1 on page 6-6.
Freescale Semiconductor
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Six 24-bit address registers (R0–R5)
A 24-bit stack pointer register (SP)
A 24-bit offset register (N, which may also be used as an address register)
A 16-bit offset register (N3)
A 16-bit modifier register (M01)
Four shadow registers (shadows of R0, R1, N, and M01)
AGU Programming Model
Secondary Address Adder Unit
Single-Bit Shifting Units
Address Generation Unit
AGU Programming Model
6-3