dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 685

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dsp56800e

Manufacturer Part Number

dsp56800e

Description

16-bit Digital Signal Controller Core

Manufacturer

Freescale Semiconductor, Inc

Datasheet

1.DSP56800E.pdf (706 pages)

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Freescale Semiconductor

Instruction

ALIGNSP

ASRR.W

BFTSTH

ADD.BP

ASLL.W

BFTSTL

ADDA.L

ASRR.L

ASRAC

BFCHG

BRCLR

ADD.W

AND.W

ASLL.L

BFCLR

BRSET

ASR16

BFSET

ADD.B

ASL.W

ADD.L

AND.L

ASL16

CLR.B

ADDA

BRAD

ASRA

ASLA

ABS

ADC

ADD

ASR

BRA

BSR

CLR

ASL

CLB

Bcc

SZ

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

*

*

*

*

*

VT

VT

VT

VT

VT

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

V

C

L

V

T

T

T

T

T

T

T

T

Table B-3. Condition Code Summary (Sheet 1 of 4)

*36

*36

*32

*xx

*16

*xx

*36

*xx

*xx

—

*8

*8

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

E

*36

*36

*32

*16

*36

*xx

*xx

*xx

*xx

*8

*8

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

U

*36 *36 *36 *36

*32 *32 *32 *32

*32 *32

*16 *16

*16 *16

*32 *32

*32 *32

*16 *16

*36 *36 *36

*xx

*xx

*xx

*xx

*36 *36 *36

Condition Code Calculation

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

*8

*8

N

?

?

?

*32

*32

*xx

*36

*xx

*xx

*xx

*8

*8

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

Z

*xx

*xx

=0

=0

=0

=0

*8

*8

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

V

?

?

*xx

*xx

—

*8

*8

—

—

—

—

—

—

—

— See Section B.3.3.2, “ASLL.W and ASLL.L,” for infor-

— See Section B.3.3.2, “ASLL.W and ASLL.L,” for infor-

—

—

— If the OMR’s SA bit is one, then the N bit is equal to

—

—

—

—

—

—

—

—

—

C

?

?

?

?

?

?

?

?

?

?

See Section B.3.3.1, “ASL and ASL.W,” for informa-

tion on the V and C bits.

See Section B.3.3.1, “ASL and ASL.W,” for informa-

tion on the V and C bits.

mation on how the N bit is set.

mation on how the N bit is set.

C is set to the value in the LSB of the source operand

prior to the operation.

bit 31 of the result. If SA is zero, then N is equal to bit

35 of the result.

STH, and BRSET.”

See Section B.3.3.4, “BFCHG, BFCLR, BFSET, BFT-

STH, and BRSET.”

See Section B.3.3.4, “BFCHG, BFCLR, BFSET, BFT-

STH, and BRSET.”

See Section B.3.3.4, “BFCHG, BFCLR, BFSET, BFT-

STH, and BRSET.”

See Section B.3.3.5, “BFTSTL and BRCLR.”

See Section B.3.3.4, “BFCHG, BFCLR, BFSET, BFT-

STH, and BRSET.”

See Section B.3.3.4, “BFCHG, BFCLR, BFSET, BFT-

See Section B.3.3.5, “BFTSTL and BRCLR.”

Comments

B-9

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