dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 192
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dsp56800e
Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800E.pdf
(706 pages)
- Current page: 192 of 706
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Data Arithmetic Logic Unit
5.9.2
When this type of rounding is selected through setting the rounding bit in the OMR, then, during a
rounding operation, one is added to the bit to the right of the rounding point (bit 15 of A0) before the bit
truncation. Figure 5-29 shows the two possible cases.
The algorithm for two’s-complement rounding is as follows:
5.9.3
Example 5-32 shows program code that demonstrates two’s-complement rounding, and Example 5-33
demonstrates convergent rounding.
5-46
Case I
Case II
*A0 is always clear; performed during RND, MPYR, MACR
Before Rounding
35
Before Rounding
35
X X . . X X X X X . . . X X X 0 1 0 0 0 1 1 0 X. . . . . . . X X X
X X . . X X X X X . . . X X X 0 1 0 1 1 1 1 0 X . . . . . . X X X
1. Add the value $0:0000:8000 to the accumulator (for the RND instruction) or to the final
2. If the SA bit in the OMR is set and the extension is in use:
3. Clear the LSP of the result before writing to a destination accumulator.
A2
A2
result without rounding (for the MACR instruction).
— Saturate to $0:7FFF:0000 if positive.
— Saturate to $F:8000:0000 if negative.
: A0 < 0.5 ($8000), then round down (add nothing)
32 31
32 31
: A0 >= 0.5 ($8000), then round up (add 1 to A1)
Two’s-Complement Rounding
Rounding Examples
MOVE.L
BFSET
NOP
NOP
RND
Example 5-32. Example Code for Two’s-Complement Rounding
A1
A1
#VALUE,A
#$0020,OMR
A
16 15
16 15
Figure 5-29. Two’s-Complement Rounding
0
1
DSP56800E Core Reference Manual
A0
A0
; Load A Accumulator
; Set the R bit for two’s-complement rounding
; (2 cycles required for R bit to be valid)
; (2 cycles required for R bit to be valid)
; Round A accumulator
0
0
After Rounding
35
After Rounding
35
X X . . X X X X X . . . X X X 0 1 0 0 0 0 0 . . . . . . . . . 0 0 0
X X . . X X X X X . . . X X X 0 1 0 1 0 0 0 . . . . . . . . . 0 0 0
A2
A2
32 31
32 31
A1
A1
Freescale Semiconductor
16 15
16 15
A0*
A0*
AA0050
0
0
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