dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 142

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Instruction Set Introduction
Information on delayed instruction execution is located in Section 9.3.4, “Non-Interruptible Instruction
Sequences,” on page 9-10.
4-46
RTID
RTS
RTSD
DO
DOSLC
Operation
Operation
#<1–63>,<ABS16>
#<1–63>,<ABS16>
#<1–63>,<ABS21>
#<1–63>,<ABS21>
DDDDD,<ABS16>
DDDDD,<ABS21>
Operands
<ABS16>
<ABS21>
Operands
Table 4-38. Change-of-Flow Instructions (Continued)
DSP56800E Core Reference Manual
Table 4-39. Looping Instructions
C
3
5
4
6
7
8
3
4
C
5
8
5
W
2
2
3
3
2
3
2
3
W
1
1
1
Load LC register with unsigned value and start hardware DO loop
with 6-bit immediate loop count. Last address is 16-bit absolute.
Executes in 3 cycles when there is a minimum of 2 instruction
words in the loop.
Case of only 1 instruction word in loop body.
Last address is 21-bit absolute address.
Executes in 4 cycles when there is a minimum of 2 instruction
words in the loop.
Case of only 1 instruction word in loop body
Load LC register with unsigned value. If LC is not equal to zero,
start hardware DO loop with 16-bit loop count in register. Other-
wise skip body of loop (adds 2 additional cycles).
Last address is 16-bit absolute.
Any register is allowed except C2, D2, C0, D0,
C, D, Y, M01, N3, LA, LA2, LC, LC2, SR, OMR, and HWS.
When looping with a value in an accumuator, use A1, B1, C1, or
D1 to avoid saturation when reading the accumulator.
Last address is 21-bit absolute address.
Any register is allowed except C2, D2, C0, D0,
C, D, Y, M01, N3, LA, LA2, LC, LC2, SR, OMR, and HWS.
When looping with a value in an accumuator, use A1, B1, C1, or
D1 to avoid saturation when reading the accumulator.
If value in LC > 0, execute loop for specified number of times.
Otherwise skip body of loop (adds 3 additional cycles).
Last address is 16-bit absolute.
Minimum of 2 instructions words required in the loop.
Last address is 21-bit absolute address.
Minimum of 2 instructions words required in the loop.
Delayed return from interrupt, restoring 21-bit PC and SR from
the stack;
must fill 3 delay slots (3 program words)
Return from subroutine, restoring 21-bit PC from the stack
Delayed return from subroutine, restoring 21-bit PC from the
stack;
must fill 3 delay slots (3 program words)
Comments
Comments
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