dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 27

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

About This Book
This manual describes the central processing unit of the DSP56800E in detail. It is intended to be used with
the appropriate DSP56800E Family member user’s manual, which describes the specific chip architecture,
peripheral definitions, and programming models. The appropriate DSP56800E Family member’s technical
data sheet provides timing, pinout, and packaging descriptions.
This manual provides practical information to help the user accomplish the following:
Audience
The information in this manual is intended to assist software engineers with developing application
software for a DSP56800E Family device.
Organization
Information in this manual is organized into chapters by topic. The contents of the chapters are as follows:
Chapter 1, “Introduction.” This chapter introduces the DSP56800E core architecture and its application.
The Introduction also provides the novice with a brief overview of digital signal processing.
Chapter 2, “Core Architecture Overview.” The DSP56800E core architecture consists of the data
arithmetic logic unit (ALU), address generation unit (AGU), bit-manipulation unit, and program controller.
This chapter describes each subsystem and the buses that interconnect the major components in the
DSP56800E central processing module.
Chapter 3, “Data Types and Addressing Modes.” This chapter presents the programming model,
introduces the MOVE instructions and their syntax, and presents the data types and addressing modes
found on the DSP56800E core.
Chapter 4, “Instruction Set Introduction.” This chapter presents register notation and summarizes the
instruction set. It shows the registers and addressing modes available to each instruction as well as the
number of execution cycles and program words required.
Chapter 5, “Data Arithmetic Logic Unit.” This chapter describes the data ALU architecture, its
programming model, methods for accessing the accumulators, and data types. The chapter also provides an
introduction to fractional and integer arithmetic on the DSP56800E and discusses other topics such as
unsigned and multi-precision arithmetic.
Chapter 6, “Address Generation Unit.” This chapter describes in detail the AGU architecture, its
programming model, its addressing modes, and its address modifiers.
Freescale Semiconductor
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Understand the operation and instruction set of the DSP56800E Family
Write code for DSC algorithms
Write code for general control tasks
Write code for communication routines
Write code for data-manipulation algorithms
About This Book
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