dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 25

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Example 7-9 JRSET and JRCLR Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9
Example 7-10 BR1SET and BR1CLR Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9
Example 7-11 JR1SET and JR1CLR Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-10
Example 8-1 Pushing a Value on the Software Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-14
Example 8-2 Pushing Multiple Values on the Software Stack . . . . . . . . . . . . . . . . . . . . . . . 8-14
Example 8-3 Popping Values from the Software Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15
Example 8-4 Subroutine Call with Passed Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16
Example 8-5 Repeat Loop Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-18
Example 8-6 DO Loop Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-19
Example 8-7 DO Loop Special Case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-20
Example 8-8 Immediate Exit from Hardware Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21
Example 8-9 Using the DOSLC Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-22
Example 8-10 Example of a REP Loop Nested Within a DO Loop . . . . . . . . . . . . . . . . . . . . 8-22
Example 8-11 Example of Nested DO Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-23
Example 8-12 Example of Nested Looping in Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-23
Example 8-13 Entering Data Memory Execution, 19-Bit Target Address . . . . . . . . . . . . . . . 8-25
Example 8-14 Entering Data Memory Execution, 21-Bit Target Address . . . . . . . . . . . . . . . 8-26
Example 8-15 Exiting Data-Memory Execution Mode, 19-Bit Target Address . . . . . . . . . . . 8-27
Example 8-16 Exiting Data-Memory Execution Mode, 21-Bit Target Address . . . . . . . . . . . 8-27
Example 9-1 BRSET Non-Interruptible Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-11
Example 10-1 Example Code to Demonstrate Pipeline Flow . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
Example 10-2 Demonstrating the Data ALU Execution Stages . . . . . . . . . . . . . . . . . . . . . . . 10-6
Example 10-3 Data ALU Operand Dependencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-27
Example 10-4 Case with No Data ALU Pipeline Dependencies . . . . . . . . . . . . . . . . . . . . . . 10-27
Example 10-5 Pipeline Dependency with AGU Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10-28
Example 10-6 Case Without AGU Pipeline Dependencies . . . . . . . . . . . . . . . . . . . . . . . . . . 10-29
Example 10-7 MOVE Instructions That Introduce Stalls . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-30
Example 10-8 Instructions with No Stalls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-31
Example 10-9 Dependency with Load of LC and Start of Hardware Loop. . . . . . . . . . . . . . 10-31
Freescale Semiconductor
List of Examples
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