dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 314

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

JTAG and Enhanced On-Chip Emulation (Enhanced OnCE)
Because emulation capabilities are tied to the particular implementation of a DSP56800E–based device,
the user’s manual for the appropriate device should be consulted for complete details on implementation
and supported functions.
11.1.1
The capabilities of the Enhanced OnCE module include the following:
These capabilities will be explained in more detail in the following sections. Additional debugging and
emulation capabilities may be provided on particular DSP56800E-based devices. Consult the user’s
manual for the particular device for more information.
11.2
A system level view of the Enhanced OnCE module resources is shown in Figure 11-1. Although the
Enhanced OnCE module is currently contained in the DSP56800E core, they are conceptually shown
separate in this picture for a simpler understanding of the debug port capabilities.
In this conceptual diagram, the DSP56800E core contains the core’s execution units, core register files, etc.
It is this block that executes DSP56800E instructions. The Enhanced OnCE module can be viewed as a
11-2
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Examine or modify the contents of any core or memory-mapped peripheral register
Examine and modify program or data memory
Step at full speed on one or more instructions
Save a programmable change-of-flow instruction capture to the trace buffer
Display the contents of the real-time instruction trace buffer
Allow the transfer of data between the core and external host in real-time program execution by
using peripheral-mapped transmit and receive registers
Access Enhanced OnCE registers and programming model by either the DSP56800E software or
the debugging system through the JTAG port
Provide status of Enhanced OnCE events in a status register or on an output pin from the core
Count a variety of events including clock cycles and instructions executed
Enter debug mode in any of the following ways:
— microprocessor instruction
— the actions of the Enhanced OnCE module
— the core JTAG port
— a special debug request input pin to the core
Interrupt or break into debug mode on program memory addresses (fetch, read, write, or read and
write access)
Interrupt or break into debug mode on accesses to data memory or on-chip peripheral registers
(read, write, or read and write access) and for byte, word, or long data type accesses
Save or restore the current state of the chip’s pipeline
Display the contents of the real-time instruction trace buffer
Return to normal user mode from debug mode
Enhanced OnCE System Level View
Enhanced OnCE Module Capabilities
DSP56800E Core Reference Manual
Freescale Semiconductor