dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 459

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
DEC.L
Operation:
D – 1 → D
Description: Decrement a long-word value in a register or memory. When an operand located in memory is operated
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Freescale Semiconductor
Before Execution
$1FFF
$2001
$2000
on, the low-order 32 bits of the result are stored back to memory. The condition codes are calculated
based on the 32-bit result. Absolute addresses pointing to long elements must always be even aligned
(that is, pointing to the lowest 16 bits).
This instruction is typically used when integer data is processed.
DEC.L
Prior to execution, the 32-bit value at location $2001:2000 is $1000:0000. Execution of the DEC.L in-
struction subtracts this value by one and generates $0FFF:FFFF. The CCR is updated based on the re-
sult of the subtraction.
E
U
N
Z
V
C
SR
SR
LF
15
— Set if the extension portion of the result is in use
— Set if the 32-bit result is unnormalized
— Set if bit 31 of the result is set
— Set if the result is zero
— Set if overflow has occurred in result
— Set if a carry (or borrow) occurs from bit 31 of the result
(no parallel move)
P4
14
X Memory
X:$2000
1000
0000
8000
0301
0300
13
P3
P2
12
MR
P1
11
P0
10
Decrement Long
Instruction Set Details
; decrement value in location: $2001:2000 by 1
I1
9
Assembler Syntax:
DEC.L
I0
8
SZ
7
$1FFF
$2001
$2000
6
L
After Execution
SR
5
E
D
U
4
CCR
X Memory
0FFF
FFFF
0310
8000
N
3
(no parallel move)
2
Z
V
1
C
0
DEC.L
A-115

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