dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 309

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

If a dependency is caused by a modification of the N3 or M01 registers by a move or bit-manipulation
instruction, or if a bit-manipulation operation is performed on the N register, the DSC does not
automatically stall the pipeline. Instead, the development tools automatically insert the appropriate number
of NOP instructions to ensure that the program executes as intended.
There are some special cases where there are no AGU dependencies. There is no dependency when
immediate values are written to the address pointer registers—R0–R5, N, and SP. Similarly, there are no
dependencies when a register is loaded with a TFRA instruction. Example 10-6 and Table 10-7 on
page 10-30 illustrate this case.
Freescale Semiconductor
Pipeline
Stage
OP2
EX2
AG
EX
P1
P2
ID
IF
n1
1
MOVEU.W
MOVE.W
MOVE.W
ADDA
MOVE.W
TFRA
MOVE.W
n2
n1
2
Example 10-6. Case Without AGU Pipeline Dependencies
n3
n2
n1
3
#$4,R0
X:(R0),A
#3,R1
R0,R1
X:(R1)-,B
R1,R2
X:(R2),C
mov.l
n4
n3
n2
Table 10-6. AGU Write Dependency Pipeline
4
mov.l
n5
n4
n3
—
5
; n1: Write AGU pointer register with immediate
; n2: Use same register to access memory
; n3: Write AGU pointer register with immediate
; n4: Use same register in AGU calculation
; n5: Use same register to access memory
; n6: Copy one AGU pointer register to another
; n7: Use same register to access memory
mov.l
Instruction Pipeline
—
—
—
—
—
6
mov.w
Instruction Cycle
mov.l
—
—
—
—
—
7
mov.w
add
n5
n4
—
—
—
8
•
Pipeline Dependencies and Interlocks
mov.w
add
n5
n4
—
—
9
•
•
mov.w
add
10
n5
n4
—
•
•
•
add
11
n5
n4
—
•
•
•
•
n5
n4
—
•
•
•
•
•
•
n5
n4
•
•
•
•
•
•
•
10-29
n5
•
•
•
•
•
•
•
•