dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 427

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
BSR
Operation:
SP + 1
PC
SP + 1
SR
PC + <OFFSET> → PC
Description: Place the PC and SR on the software stack and branch to the location in program memory at PC + dis-
Example:
Explanation of Example:
Condition Codes Affected:
Restrictions:
Instruction Fields:
Instruction Opcodes:
Timing:
Memory:
Freescale Semiconductor
BSR
BSR
Operation
BSR
<OFFSET18>
<OFFSET22>
→ SP
→ X:(SP)
→ SP
→ X:(SP)
placement. The PC contains the address of the next instruction. The displacement is an 18-bit or 22-bit
signed value that is sign extended to form the PC-relative offset.
BSR
In this example, program execution is transferred to the subroutine at the PC-relative address that is
represented by LABEL. The relative offset that is given by the label can be an 18- or 22-bit signed
value.
The condition codes are not affected by this instruction.
Refer to Section 10.4, “Pipeline Dependencies and Interlocks,” on page 10-26.
5–6 oscillator clock cycles
2–3 program words
<OFFSET18>
<OFFSET22>
Operands
LABEL
; branch to PC-relative address “LABEL”
Branch to Subroutine
C
5
6
15
15
1
1
1
Instruction Set Details
W
2
3
1
1
1
18-bit signed offset
22-bit signed offset
1
1
1
Assembler Syntax:
BSR
12
12
0
0
0
11
11
0
0
0
0
A
0
AAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAA
A
1
1
<OFFSET18> or <OFFSET22>
A
0
0
8
8
Comments
7
0
7
0
0
1
A
1
1
1
1
0
1
0
4
4
A
1
1
3
3
1
A
1
BSR
A
A
0
A
A
0
A-83
0
0

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