dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 279

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
9.5.1
The timing for entering and exiting stop mode is determined by the architecture of the particular
DSP56800E–based device being used. Consult the specific device’s user’s manual for more information
on stop mode timing.
9.5.2
The DSP56800E core supports the permanent disabling of the stop processing state. If disabled, stop mode
can never be entered, and the STOP instruction simply executes five NOPs. Upon completing the NOP
cycles, program execution continues with the instruction that immediately follows the STOP instruction.
Consult the specific DSP56800E device’s user’s manual for more information on disabling stop mode.
9.6
The debug processing state is a state where the core is halted and placed under the control of the Enhanced
OnCE debug port. Serial data is shifted in and out of this port, and it is possible to execute instructions
from this processing state. It is also possible to use the debug port without entering the debug processing
state. This is useful for applications where the core must not be halted.
Freescale Semiconductor
Debug Processing State
Stop Mode Timing
Disabling Stop Mode
Processing States
Debug Processing State
9-13

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