dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 165

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

5.3.3.2
There are two techniques for performing integer multiplication on the DSC core:
Each technique offers advantages for different types of computations.
Integer processing code usually requires only a 16-bit result, since greater precision is rarely needed. The
word-size integer multiplication instruction, IMPY.W, provides this capability, generating a 16-bit
unrounded result. Figure 5-15 on page 5-20 shows the multiply operation for integer arithmetic with a
word-sized result. The multiplication of two 16-bit, signed, integer operands using the IMPY.W instruction
gives a 16-bit, signed integer result that is placed in the FF1 portion of the accumulator. The corresponding
extension register (FF2) is filled with sign extension, and the FF0 portion remains unchanged.
Freescale Semiconductor
Signed Fractional
Signed Fractional
Multiplier Result
•
•
Input Operands
Signed 31-Bit
Intermediate
MPY Result
Using the IMPY.W instruction to generate a 16-bit result in the FF1 portion of an accumulator
Using the IMPY.L and IMAC.L instructions to generate a 36-bit full-precision result
Integer Multiplication
EXT
Figure 5-14. Fractional Multiplication (MPY)
s
s
s
Data Arithmetic Logic Unit
Input Operand 1
16 Bits
MSP
36 Bits
31 Bits
X
Fractional and Integer Arithmetic
s
Signed Multiplier
Input Operand 2
16 Bits
LSP
0
5-19