dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 16

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

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xvi
Immediate Addressing: 7-Bit Immediate Data to Address Register. . . . . . . . . 3-39
Immediate Addressing: 7-Bit Immediate Data to Data ALU Register . . . . . . . 3-39
Immediate Addressing: 16-Bit Immediate Data to AGU Register . . . . . . . . . . 3-40
Immediate Addressing: 16-Bit Immediate Data to Data ALU Register . . . . . . 3-40
Immediate Addressing: 32-Bit Immediate Data . . . . . . . . . . . . . . . . . . . . . . . . 3-41
Absolute Addressing: 6-Bit Absolute Short Address . . . . . . . . . . . . . . . . . . . . 3-42
Absolute Addressing: 6-Bit I/O Short Address . . . . . . . . . . . . . . . . . . . . . . . . 3-43
Absolute Addressing: 16-Bit Absolute Address . . . . . . . . . . . . . . . . . . . . . . . . 3-44
Absolute Addressing: 24-Bit Absolute Address . . . . . . . . . . . . . . . . . . . . . . . . 3-45
Moving Data in the Register Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-50
Data ALU Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
Data ALU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
The 32-Bit Y Register—Composed of Y1 Concatenated with Y0. . . . . . . . . . . 5-4
Different Components of an Accumulator (Using “FF” Notation) . . . . . . . . . . 5-4
Writing the Accumulator as a Whole . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8
Writing the Accumulator by Portions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
Writing the Accumulator Extension Registers (FF2) . . . . . . . . . . . . . . . . . . . . 5-10
Reading the Accumulator Extension Registers (FF2) . . . . . . . . . . . . . . . . . . . 5-11
Integer Word Addition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
Fractional Word Addition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
Adding a Word Integer to a Long-Word Integer . . . . . . . . . . . . . . . . . . . . . . . 5-17
Adding a Word Fractional to a Long-Word Fractional . . . . . . . . . . . . . . . . . . 5-17
Comparison of Integer and Fractional Multiplication . . . . . . . . . . . . . . . . . . . 5-18
Fractional Multiplication (MPY) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19
Integer Multiplication with Word-Sized Result (IMPY.W) . . . . . . . . . . . . . . . 5-20
Integer Multiplication with Long-Word-Sized Result (IMPY.L). . . . . . . . . . . 5-20
16- and 32-Bit Logical Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25
Arithmetic Shifts on 16-Bit Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26
Arithmetic Shifts on 32-Bit Long Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26
Single-Precision-Times-Double-Precision Signed Multiplication . . . . . . . . . . 5-30
Double-Precision-Times-Double-Precision Signed Multiplication . . . . . . . . . 5-31
32-Bit × 32-Bit –> 32-Bit Signed Integer Multiplication . . . . . . . . . . . . . . . . . 5-33
32-Bit × 32-Bit –> 32-Bit Unsigned Integer Multiplication. . . . . . . . . . . . . . . 5-34
32-Bit × 32-Bit –> 64-Bit Signed Integer Multiplication . . . . . . . . . . . . . . . . . 5-35
Normalizing a Small Negative Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-36
Normalizing a Large Positive Value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-37
Example of Saturation Arithmetic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40
Convergent Rounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-45
Two’s-Complement Rounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-46
DSP56800E Core Reference Manual
Freescale Semiconductor