dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 184

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Data Arithmetic Logic Unit
values that are larger than one cannot be normalized. For most applications, this limitation should not be a
problem. However, if it is necessary to consider the extension register when a value is normalized, the
NORM technique must be used.
Regardless of the method that is used to normalize an accumulator, the second register (R0 and X0 in
Example 5-27 and Example 5-28 on page 5-37, respectively) holds the amount by which the accumulator
was scaled. This value can be used later to scale the normalized accumulator back to its original
magnitude.
5.7
The results of calculations are reflected in the condition code flag bits. To understand how the value of the
condition code bits is calculated after an operation, consider a number of factors:
This section discusses how the condition code mode and data sizes affect the condition codes. A detailed
discussion of condition code calculation appears in Appendix B, “Condition Code Calculation.”
5.7.1
In earlier generations of the DSP56800E architecture, two condition code modes were available: 36-bit
mode, where the extension portion of the accumulator was considered when condition codes were
calculated, and 32-bit mode, where the the extension registers were ignored. Setting the CM bit in the
operating mode register (OMR) meant that 32-bit mode was selected. This mode was useful for integer and
control code because the extension registers are not typically used in those algorithms.
Although both condition code modes are supported on the DSP56800E, using 32-bit mode is not generally
recommended, nor is it necessary. The DSP56800E instruction set supports test and compare instructions
for byte, word, long, and 36-bit values, so the exact data size can be specified at all times depending on the
needs of the program. Thirty-two-bit condition code mode should only be used when exact compatibility
with existing DSP56800 program code is required.
5.7.2
The DSP56800E properly calculates condition codes for all supported data types. The calculation depends
on the size and type of the data that is being manipulated. Consider the compare instruction, for example.
The DSP56800E instruction set supports four different versions of the compare instruction:
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The size of the operands, as specified by the instruction
The operation’s destination: accumulator, 16-bit register, or memory location
Whether the instruction operates on the whole accumulator or only on a portion
The current condition code mode
Whether or not the MAC output limiter is enabled
CMP.B and CMP.BP—compare two byte values
CMP.W—compare two word values
CMP.L—compare the lowest 32 bits of an accumulator with the lowest 32 bits of a second
accumulator or with a 16-bit source
CMP—compare an entire 36-bit accumulator with a second 36-bit accumulator or with a 16-bit
source
Condition Code Calculation
Condition Code Modes
Condition Codes and Data Sizes
DSP56800E Core Reference Manual
Freescale Semiconductor