dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 507

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

JSR
Operation:
SP + 1
PC
SP + 1
SR
S
Description: Jump to subroutine in program memory located at the effective address specified by the operand. The
Example:
Explanation of Example:
Condition Codes Affected:
Restrictions:
Instruction Fields:
Instruction Opcodes:
Timing:
Memory:
Freescale Semiconductor
JSR
JSR
JSR
Operation
JSR
(RRR)
<ABS19>
<ABS21>
→ SP
→ X:(SP)
→ SP
→ X:(SP)
→ PC
operand can be a 19- or 21-bit absolute address or a register.
JSR
In this example, program execution is transferred to the subroutine at the address that is represented by
LABEL. The DSC core supports program addresses up to 21 bits wide.
The condition codes are not affected by this instruction.
Refer to Section 10.4, “Pipeline Dependencies and Interlocks,” on page 10-26.
4–5 oscillator clock cycles
1–3 program word(s)
Operands
<ABS19>
<ABS21>
(RRR)
LABEL
; jump to absolute address indicated by “LABEL”
C
Jump to Subroutine
5
4
5
15
15
15
1
1
1
1
Instruction Set Details
W
2
3
1
1
1
1
1
Push 21-bit return address and jump to target address contained
in the RRR register
Push 21-bit return address and jump to 19-bit target address
Push 21-bit return address and jump to 21-bit target address
1
1
1
1
Assembler Syntax:
JSR
12
12
12
0
0
0
0
11
11
11
0
0
0
0
A
0
1
0
AAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAA
A
1
1
1
S {(RRR) or <ABS19> or <ABS21>}
A
8
0
8
0
0
8
Comments
7
0
0
7
0
0
7
A
1
0
1
1
0
0
0
1
1
1
1
4
4
4
N
A
A
0
3
3
3
A
1
1
1
JSR
A
N
0
A
A-163
A
N
A
0
0
0
0