dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 182

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Data Arithmetic Logic Unit
C1:C0 = A1 × B1:B0
(Both Operands Are Signed)
;Signed 16-Bit x Signed 32-Bit Integer Multiplication
5.6
For many algorithms, maximum precision in calculations is required to ensure proper results. For example,
when very small fractional values are worked with, there may not be enough binary digits in an
accumulator to accurately reflect a value. The normalizing capabilities provided by the DSP56800E
architecture can help correct this problem.
Normalizing involves scaling a value to a known magnitude. On the DSP56800E, a normalized value is
one that has no significant digits to the left of the binary point. Thus, in an accumulator register, a
normalized value has 1 sign bit and 31 significant digits. A value can be normalized, the original
magnitude can be saved, calculations can be performed, and the result can be scaled back to its original
magnitude.
5.6.1
On the DSP56800E architecture, a value is considered normalized if there are no significant digits to the
left of the binary point. Bits to the left of the binary point should contain only the sign and sign extension.
Figure 5-25 shows both non-normalized and normalized values in an accumulator.
The first value in Figure 5-25 is not normalized: the first significant bit in the value is bit 21, and all bits to
the left are merely the sign and sign extension. The second value in Figure 5-25 shows the same value
normalized. The value has been left shifted 10 bits, eliminating the sign-extension bits and placing the sign
in bit 31 and the most significant bit in bit 30.
Figure 5-26 on page 5-37 shows a second value before and after normalization. In this example, the value
has been right shifted 3 bits to place the most significant bit to the right of the binary point.
5-36
A
Normalizing
Normalized Values
35 32 31
A2
IMPYSU
TFR
IMPY.L
ADD
F
Example 5-26. Multiplying Signed 16-Bit Word with Signed 32-Bit Long
F
Before Normalization
F
A1
A1,B0,Y
Y,C
A,B,Y
Y0,C
E
Figure 5-25. Normalizing a Small Negative Value
4
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DSP56800E Core Reference Manual
6
C
A0
; Y1:Y0 = signed A1 x unsigned B0
; Y1:Y0 = signed A1 x signed B1
; Combine Results: final 32-bit result in C
3
1
0
A
35 32 31
A2
F
9
After Normalization
1
A1
B
0
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Freescale Semiconductor
C
4
A0
0
0
0

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