dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 365

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

ADD.W
Operation:
S + D →
Description: Add the source operand to the second operand (register or memory), and store the result in the desti-
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Freescale Semiconductor
Before Execution
A2
D
0
nation (D). The source operand (except for a short immediate operand) is first sign extended internally
to form a 20-bit value; this value is concatenated with 16 zero bits to form a 36-bit value when the des-
tination is one of the four accumulators. A short immediate (0–31) source operand is zero extended
before the addition. The addition is then performed as a 20-bit operation. Condition codes are calcu-
lated based on the size of the destination.
This instruction can be used for both integer and fractional two’s-complement data.
ADD.W
Prior to execution, the 36-bit A accumulator contains the value $0:0058:1234. The ADD.W instruction
automatically sign extends the immediate value to 20 bits and adds the result to accumulator A. The
result is stored back in A.
L
E
U
N
Z
V
C
LF
15
— Set if overflow has occurred in the result
— Set if the extended portion of the 20-bit result is in use
— Set if the 20-bit result is unnormalized
— Set if the high-order bit of the result is set
— Set if the result equals zero (accumulator bits 35–0 or bits 15–0 of a 16-bit register)
— Set if overflow has occurred in the result
— Set if a carry occurs from the high-order bit of the result
(no parallel move)
0058
P4
14
A1
#3,A
13
P3
SR
P2
12
MR
P1
11
; add decimal 3 to A
1234
0300
A0
P0
10
Instruction Set Details
I1
9
Add Word
Assembler Syntax:
ADD.W
I0
8
SZ
7
After Execution
6
L
A2
0
5
E
S,D
U
4
CCR
005B
A1
N
3
(no parallel move)
SR
2
Z
V
1
1234
0310
C
0
A0
ADD.W
A-21