dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 214

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Address Generation Unit
6.8
When an arithmetic operation is performed in the address generation unit, two modes of address
computation can be used: linear or modulo arithmetic. Linear arithmetic is required for general purpose
address computation and is found on all microprocessors. Modulo arithmetic allows the creation of special
data structures in memory. Data is manipulated by updating address registers (pointers) rather than moving
large blocks of data.
Many DSC and standard control algorithms require the use of specialized data structures, such as circular
buffers, FIFOs, and stacks. Using these structures allows data to be manipulated simply by updating
address register pointers, rather than by moving large blocks of data. The DSP56800E architecture
provides support for these algorithms by implementing modulo arithmetic in the address generation unit.
Modulo arithmetic is enabled for the R0 and R1 registers through programming the modifier register
(M01). Modulo arithmetic is not available for the R2–R5, N, and SP registers. Memory accesses using the
R2-R5, N, and SP pointers are always performed with linear arithmetic.
6.8.1
The alternative to modulo address arithmetic is linear arithmetic, as found on general-purpose
microprocessors. It is performed using 24-bit two’s-complement addition and subtraction. The 24-bit
offset register N, or immediate data (+1, –1, or a displacement value), is used in the address calculations.
Addresses are normally considered unsigned; offsets are considered signed.
Linear arithmetic is performed on the R2–R5, N, and SP registers at all times. Linear arithmetic is enabled
for the R0 and R1 registers through setting the modifier register (M01) to $FFFF. The M01 register is set to
$FFFF on reset. The shadow register for M01 is not initialized on reset, and must be manually set
according to the address arithmetic selection when shadow registers are swapped.
6.8.2
To understand modulo address arithmetic, consider a circular buffer. A circular buffer is a block of
sequential memory locations with a special property: a pointer into the buffer is limited to the buffer’s
address range. When a buffer pointer is incremented such that it would point past the end of the buffer, the
pointer is “wrapped” back to the beginning of the buffer. Similarly, decrementing a pointer that is located
at the beginning of the buffer wraps the pointer to the end. This behavior is achieved by performing
modulo arithmetic when the buffer pointers are incremented or decremented. See Figure 6-7.
6-20
Linear and Modulo Address Arithmetic
Linear Address Arithmetic
Understanding Modulo Arithmetic
DSP56800E Core Reference Manual
Freescale Semiconductor