dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 203

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
No update
X:(Rn)
Post-increment
X:(Rn)+
Post-decrement
X:(Rn)–
Post-update by offset N
X:(Rn)+N
Indexed by offset N
X:(Rn+N)
Indexed by 3-bit offset
X:(RRR+x)
Indexed by 6-bit offset
X:(SP–xx)
Indexed by 3-bit offset
X:(SP–x)
Indexed by 16-bit offset
X:(Rn+xxxx)
Indexed by 24-bit offset
X:(Rn+xxxxxx)
6-bit absolute short
X:aa
6-bit peripheral short
X:<<pp
16-bit absolute address
X:xxxx
24-bit absolute address
X:xxxxxx
1.The upper 18 bits are hard-wired to a specific area of memory, which varies depending on the specific
implementation of the chip.
2.The X:xxxx and X:xxxxxx addressing modes are allowed for byte accesses when they are used as the des-
tination address in a byte memory to memory move instruction. In this case, the source address is specified
with a word pointer, and the destination is an absolute byte address.
Addressing Mode
Table 6-2. Hardware Implementation of Addressing Mode Arithmetic—
2
2
Rn+(xxxxxx>>1)
Rn+(xxxx>>1)
Byte Access
Address for
RRR+(x>>1)
SP–(x>>1)
—
—
—
—
—
—
—
—
—
—
Word Pointers to Data Memory
Address Generation Unit
Word Access
Address for
Rn+xxxxxx
Rn+xxxx
00FFxx
0000xx
00xxxx
xxxxxx
SP–xx
Rn+N
Rn+N
Rn+1
Rn–1
Rn+x
Rn
—
1
Rn+(xxxxxx<<1)
Long Access
Rn+(xxxx<<1)
Address for
(00xxxx<<1)
(xxxxxx<<1)
SP–(xx<<1)
Rn+(N<<1)
Rn+2
Rn–2
Word Pointer Memory Accesses
Rn
—
—
—
—
—
Post-increment occurs
after access.
Post-decrement occurs
after access.
The lower 16 bits of N
are sign extended to 24
bits and added to Rn.
Offset x from 0 to 7.
6-bit one extended;
SP pointer only.
3-bit one extended.
Signed 16-bit offset.
Signed 24-bit offset.
Comments
6-9