dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 183

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

In both Figure 5-25 on page 5-36 and Figure 5-26, the normalized values are aligned so that the most
significant bit is placed in bit 30. On the DSP56800E architecture, this alignment ensures that positive
values p lie in the range 0.5 < p < 1.0 and that negative values n lie in the range –1.0 < n < –0.5. The
amount by which the values were shifted can be used to scale the normalized values back to their original
magnitudes.
5.6.2
There are two methods for normalizing a value in an accumulator. One, using the NORM instruction, is
more flexible but slow. The other method executes much more quickly, but is limited in the values it can
normalize.
The NORM instruction can be used to normalize a full 36-bit accumulator. Each time NORM is executed,
the accumulator to be normalized is shifted 1 bit right or left, as necessary, and a second register is
incremented. NORM is executed repeatedly until the accumulator value is fully normalized. Example 5-27
shows the general method.
The NORM instruction uses the E, U, and Z bits in the status register to determine how a value should be
shifted, so a TST instruction on the accumulator that is to be normalized must be executed before NORM
to ensure that the condition codes are set properly. At the end of the sequence in Example 5-27, the A
accumulator is normalized, and the R0 register holds the number of shifts required to normalize A.
Unfortunately, it is not possible to determine in advance how many shifts will be required to normalize a
value. Because up to 31 shifts might be required, NORM must be executed 31 times to ensure that the
value is fully normalized. In Example 5-27, a REP instruction is used to execute NORM for the proper
number of times. Although it wastes time to execute NORM more times than is necessary, NORM has no
effect on already normalized values, so there are no adverse side effects.
There is a second method for normalizing an accumulator that is less flexible but much faster. The CLB
instruction is used to determine the number of leading zeros or ones in a value, and a simple shift
instruction normalizes the accumulator. Example 5-28 shows this method.
This method is clearly more efficient, requiring only two instructions (the NORM technique requires 33
instructions to be executed). However, the CLB instruction only counts leading bits in the 32-bit MSP:LSP
portion of the accumulator. Because the extension portion of the accumulator is ignored by CLB, fractional
Freescale Semiconductor
A
Normalizing Methods
35 32 31
A2
TST
REP
NORM
CLB
ASLL.L
2
7
Before Normalization
C
A1
Example 5-27. Normalizing with the NORM Instruction
A
#31
R0,A
A,X0
X0,A
Example 5-28. Normalizing with a Shift Instruction
C
Figure 5-26. Normalizing a Large Positive Value
3
16 15
4
0
Data Arithmetic Logic Unit
A0
; establish condition codes for NORM
; do 31 normalization steps
; execute a normalization step
; place # of leading bits - 1 into X
; shift A left to normalize
0
0
0
A
35 32 31
A2
0
4
After Normalization
F
A1
9
8
16 15
6
8
A0
0
Normalizing
0
0
5-37