dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 570

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

NEG.BP
Operation:
0 – D→ D
Description: Compute the two’s-complement of a byte value in memory. The value is internally sign extended to
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
A-226
Before Execution
Addresses
(no parallel move)
Byte
20 bits before being negated. The low-order 8 bits of the result are stored back to memory. The condi-
tion codes are calculated based on the 8-bit result, with the exception of the E and U bits, which are
calculated based on the 20-bit result. Absolute addresses are expressed as byte addresses. The result is
not affected by the state of the saturation bit (SA).
This instruction is typically used when integer data is processed.
NEG.BP X:$3065
Prior to execution, the value at byte address X:$3065 is $44. Execution of the NEG.BP instruction com-
putes the two’s-complement of this value and generates the result $BC with a borrow (the carry bit is
set). The result is negative since bit 7 is set. Note that this address is equivalent to the upper byte of
word address $1832.
E
U
N
Z
V
C
LF
15
— Set if the extension portion of the 20-bit result is in use
— Set if the 20-bit result is unnormalized
— Set if bit 7 of the result is set
— Set if the result is zero
— Set if overflow has occurred in result
— Set if a borrow occurs from bit 7 of the result
$3066
$3064
$3062
$3068
P4
14
SR
13
P3
7
88
66
44
22
X Memory
P2
12
MR
Negate Byte (Byte Pointer)
030F
DSP56800E Core Reference Manual
0
P1
11
7
77
55
33
11
P0
10
0
; negate the byte at (byte) address $3065
I1
9
Assembler Syntax:
NEG.BP
I0
8
SZ
7
After Execution
Addresses
6
L
Byte
5
E
D
U
4
CCR
$3068
$3066
$3064
$3062
SR
N
3
(no parallel move)
7
2
Z
BC
88
66
22
X Memory
Freescale Semiconductor
0319
V
1
0
7
NEG.BP
C
0
77
55
33
11
0