dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 525

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

MACR
Parallel Dual Reads:
Instruction Opcodes:
Timing:
Memory:
Freescale Semiconductor
MACR
MACR
MACR
MACR
MACR –FFF1,FFF1,FFF
1.This instruction is not allowed when the XP bit in the OMR is set (that is, when the instructions are executing
from data memory).
2.This instruction occupies only 1 program word and executes in 1 cycle for every addressing mode.
Operation
MACR
Data ALU Operation
FFF1,FFF1,FFF
Q1,Q2,F GGG,X:<ea_m>
Q1,Q2,F X:<ea_m>,GGG
Q3,Q4,F X:<ea_m>,reg1
2
1 oscillator clock cycle
1 program word
X:<ea_v>,reg2
Operands
Y1,X0,F
Y1,Y0,F
Y0,X0,F
C1,Y0,F
1
Multiply-Accumulate and Round
15
15
15
15
15
0
0
0
0
0
Instruction Set Details
Source 1
X:(R0)+N
X:(R1)+N
X:(R4)+N
X:(R0)+N
X:(R4)+N
X:(R0)+
X:(R1)+
X:(R4)+
X:(R0)+
X:(R4)+
1
0
0
1
1
First Memory Read
1
0
1
1
1
12
12
12
12
12
0
1
1
1
0
11
11
11
11
11
1
1
1
0
1
Destination 1
G
G
0
1
1
Y0
Y1
Y0
Y1
G
G
F
F
v
G
G
F
F
v
8
8
8
8
8
F
F
F
F
F
7
7
7
7
7
X:(R3)+N3
X:(R3)+N3
Source 2
Q
Q
X:(R3)+
X:(R3)–
X:(R3)+
X:(R3)+
J
v
J
Second Memory Read
Q
Q
Q
J
J
Q
Q
Q
J
J
4
4
4
4
4
J
1
1
1
J
3
3
3
3
3
MACR
Destination 2
m
m
m
J
J
X0
X0
C
R
R
1
0
1
A-181
R
R
0
v
1
0
0
0
0
0