dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 126

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Instruction Set Introduction
4-30
IMPYUU
MACSU
MPYSU
ABS
ADC
ADD
ADD.B
ADD.BP
Operation
Operation
Table 4-30. Data ALU Extended-Precision Multiplication Instructions (Continued)
Table 4-31. Data ALU Arithmetic Instructions (Sheet 1 of 8)
Y0,C1,EEE
Y1,C1,EEE
Y0,C1,EEE
Y1,C1,EEE
X0,Y1,EEE
X0,Y0,EEE
Y0,Y1,EEE
Y0,Y0,EEE
Y0,A1,EEE
Y1,B1,EEE
X0,Y1,EEE
X0,Y0,EEE
Y0,Y1,EEE
Y0,Y0,EEE
Y0,A1,EEE
Y1,B1,EEE
Operands
X:xxxxxx,EEE
A0,C0,FF
A0,D0,FF
B0,C0,FF
B0,D0,FF
C0,C0,FF
C0,D0,FF
A0,A0,FF
A0,B0,FF
C1,C0,Y
C1,D0,Y
A1,A0,Y
A1,B0,Y
A1,C0,Y
A1,D0,Y
B1,C0,Y
B1,D0,Y
X:xxxx,EEE
Operands
#xxx,EEE
(parallel)
FFF,FFF
(parallel)
FFF
Y,F
DSP56800E Core Reference Manual
1
1
C
1
1
C
1
1
1
2
2
3
W
1
1
1
1
W
1
1
1
2
2
3
Integer 16 × 16 multiply:
F1 (unsigned) × F0 (unsigned).
This instruction is described in more detail in
Section 5.5.3, “Multi-Precision Integer Multiplication,” on
page 5-32.
Integer 16 × 16 multiply:
F0 (unsigned) × F0 (unsigned).
This instruction is described in more detail in
Section 5.5.3, “Multi-Precision Integer Multiplication,” on
page 5-32.
16 × 16 => 32-bit unsigned/signed fractional MAC.
The first operand is treated as signed and the second as
unsigned.
16 × 16 => 32-bit signed/unsigned fractional multiply.
The first operand is treated as signed and the second as
unsigned.
Absolute value.
Refer to Table 4-41 on page 4-48.
36-bit addition of two registers.
Refer to Table 4-41 and Table 4-42.
Add memory byte to register.
Add with carry (set C bit also).
Add 9-bit signed immediate.
Comments
Comments
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