dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 82

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Data Types and Addressing Modes
3.6.3.4
The address of the operand is in the address register Rn, N, or SP. After the operand address is used, the
contents of the offset register (N or N3) are added to the address register and stored in the same address
register. In the addressing update, the contents of the offset register are treated as a signed, 16-bit,
two’s-complement number (the offset register itself remains unchanged). The lower 16 bits of the offset
register are sign extended to 24 bits and used in the addition to the address register. The 24-bit result is then
stored back to the address register.
Figure 3-18 demonstrates this addressing mode.
3-32
Available for: Word
Assembler Syntax: X:(Rn)+N, X:(R3)+N3, X:(N)+N, X:(SP)+N, P:(Rj)+N
Additional Instruction Execution Cycles: 0
Additional Effective Address Program Words: 0
Y
$003204
$003200
Post-Update by Offset N: (Rn)+N, (R3)+N3
31
5
The upper 8 bits of the N register are ignored in this addressing mode.
R2
Figure 3-18. Address Register Indirect: Post-Update by Offset N
N
5
Y1
15
23
23
Before Execution
X
X
Post-Update by Offset N Example:
5
X Memory
$003200
$F00004
X
X
5
16 15
X
X
A
DSP56800E Core Reference Manual
X
X
0
0
A
0
Y0
A
Sign Extend
from Bit 15
A
0
NOTE:
+
MOVE.W Y1,X:(R2)+N
Y
$003204
$003200
31
5
R2
N
5
Y1
15
23
23
After Execution
X
5
5
X Memory
$003204
$F00004
X
5
5
16 15
X
5
A
Freescale Semiconductor
X
5
0
0
A
0
Y0
A
A
0