dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 574

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

NEG.W
Operation:
0 – D→ D
Description: Compute the two’s-complement of a word value in memory. The value is internally sign extended to
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
A-230
Before Execution
Addresses
(no parallel move)
Word
20 bits before being subtracted from zero. The low-order 16 bits of the result are stored back to mem-
ory. The condition codes are calculated based on the 16-bit result, with the exception of the E and U
bits, which are calculated based on the 20-bit result.
This instruction is typically used when integer data is processed.
NEG.W
Prior to execution, the 16-bit value at location $2000 is $FF00. Execution of the NEG.W instruction
computes the two’s-complement of this value and generates $0100. The CCR is updated based on the
result of the subtraction.
E
U
N
Z
V
C
LF
15
— Set if the extension portion of the 20-bit result is in use
— Set if the 20-bit result is unnormalized
— Set if bit 15 of the result is set
— Set if the result is zero
— Set if overflow has occurred in result
— Set if a borrow occurs from bit 15 of the result
$2003
$2002
$2001
$2000
P4
14
SR
X:$2000
13
P3
15
X Memory
P2
12
MR
00AA
FF00
0000
0001
0300
DSP56800E Core Reference Manual
P1
11
P0
10
0
Negate Word
; negate the word at address $2000
I1
9
Assembler Syntax:
NEG.W
I0
8
SZ
7
After Execution
6
L
Addresses
Word
5
E
D
U
4
CCR
$2003
$2002
$2001
$2000
N
3
SR
(no parallel move)
15
2
Z
Freescale Semiconductor
X Memory
V
1
00AA
0311
0000
0001
0100
C
0
NEG.W
0