dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 155

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
See Section 5.2, “Accessing the Accumulator Registers,” for a discussion of when it is appropriate to
access an accumulator by its individual portions and when it is appropriate to access an entire accumulator.
5.2.1.2
The extension registers (FF2) offer protection against 32-bit overflow. When the result of an accumulation
crosses the MSB of MSP (bit 31 of FF), the extension in use bit of the status register (E) is set. Up to 15
overflows or underflows are possible using the accumulator extension bits, after which the sign is lost
beyond the MSB of the extension register. When this loss occurs, the overflow bit (V) in the status register
is set. The extension register allows overflow during intermediate calculations without losing important
information. This capability is particularly useful during the execution of DSC algorithms, where
intermediate calculations might overflow.
The extension in use bit is used to determine when to saturate the value of an accumulator when it is
written to memory or when it is transferred to any data ALU register. If saturation occurs, the content of
the original accumulator is not affected (unless the same accumulator is specified as both source and
destination); only the value transferred is limited to a full-scale positive or negative 16-bit value ($7FFF or
$8000). This same logic applies to the SAT instruction.
When limiting occurs, the L flag in the status register is set. Saturation and limiting are explained in more
detail in Section 5.8, “Saturation and Data Limiting.”
5.2.2
The instruction set provides for loading and storing one portion of an accumulator register without
affecting the other two portions. When an instruction uses the FF1 or FF0 notation instead of F, the
instruction only operates on the specified 16-bit portion without modifying the other two portions. When
an instruction specifies FF2, the instruction operates only on the 4-bit accumulator extension register
without modifying the FF1 or FF0 portions of the accumulator. Refer to Table 5-1 on page 5-7 for a
summary of ways to access the accumulator registers.
Figure 5-6 on page 5-10 shows some examples of writing values to portions of the accumulator. Note that
only one of the three portions of the accumulator is modified by each of these instructions—the other two
portions remain unmodified.
Freescale Semiconductor
Accessing Portions of an Accumulator
MOVE.L
CLR.W
Using the Extension Registers
If the extension bits of an accumulator contain only sign extension (the E
bit in the status register is not set), saturation is unnecessary, and a read of
an entire accumulator is identical to a read of just the FF1 portion.
Limiting is performed only when the entire 36-bit accumulator register
(FF) is specified as the source for a data move or is transferred to another
register. It is not performed when FF2, FF1, or FF0 is specified.
Example 5-3. Unsigned Load of a Long Word to an Accumulator
X:(R0),B
B2
Data Arithmetic Logic Unit
NOTE:
NOTE:
Accessing the Accumulator Registers
5-9

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