dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 253

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Popping values from the software stack is fairly straightforward. With the use of the post-decrement
addressing mode, values can be popped from the stack in a single instruction. To pop the four values that
are saved on the stack in Example 8-2 on page 8-14, the code in Example 8-3 can be executed.
; Popping four values from the software stack
; Finishes in 4 cycles, 4 instruction words
8.3.2
The JSR and BSR instructions are used to call subroutines. When a JSR or BSR is executed, the return
address (the value in the program counter) is pushed onto the stack. Because the high-order 5 bits of the
program counter are contained in the status register, the return address is saved by pushing both the PC and
the SR, in that order, onto the stack. Figure 8-3 shows the software stack after a JSR has been executed.
The RTS and RTSD instructions pop the PC and SR off the stack when a subroutine is exited. Only the
P4–P0 bits are actually updated in the SR; the remaining bits are discarded.
8.3.3
Entries in the DSP56800E interrupt and exception vector table frequently consist of a JSR instruction, with
a service routine target address as its argument. When an exception occurs, the program counter is moved
to the address of the appropriate entry in the vector table. If there is a JSR instruction at that location, it is
fetched and executed in the same way that a JSR would normally be executed.
The JSR instruction stacks the program counter (the return address from the interrupted program) and
status register, as shown in Figure 8-3. When the interrupt service routine is complete, an RTI or RTID
instruction is executed. Like the RTS and RTSD instructions, these instructions pop the program counter
and status register from the stack. Unlike RTS and RTSD, the RTI and RTID instructions do not discard
the contents of the stored status register, but use them to restore the status bits in SR. This restoration
ensures that the processor state is not changed by the actions of the interrupt service routine.
Freescale Semiconductor
Subroutines
Interrupt Service Routines
MOVE.L
MOVE.L
MOVE.L
MOVE.L
Example 8-3. Popping Values from the Software Stack
Figure 8-3. Effects of the JSR Instruction on the Stack
X:(SP)-,R1
X:(SP)-,R0
X:(SP)-,B10
X:(SP)-,A10
SP
Status Register (Contains P4–P0)
Program Controller
Return Address (16 LSBs)
Data Memory
; SP left pointing at previous top of stack
Software Stack
8-15

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