dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 510

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

LSR.W
Operation:
(see following figure)
Description: Logically shift 16 bits of the destination operand (D) by 1 bit to the right, and store the result in the
Example:
Explanation of Example:
Condition Codes Affected:
A-166
Before Execution
B2
F
destination. If the destination is a 36-bit accumulator, the result is stored in the MSP of the accumulator
(FF1 portion), and the remaining portions of the accumulator are not modified. The LSB of the desti-
nation (bit 16 if the destination is a 36-bit accumulator) prior to the execution of the instruction is shift-
ed into C, and zero is shifted into the MSB of D1 (bit 31 if the destination is a 36-bit accumulator). The
result is not affected by the state of the saturation bit (SA).
LSR.W
Prior to execution, the 36-bit B accumulator contains the value $F:0001:00AA. Execution of the
LSR.W instruction shifts the 16-bit value in the B1 register by 1 bit to the right and stores the result
back in the B1 register. C is set by the operation because bit 0 of B1 was set prior to the execution of
the instruction. The Z bit of CCR (bit 2) is also set because the result in B1 is zero. The overflow bit
(V) is always cleared.
N
Z
V
C
LF
15
— Always cleared
— Set if the MSP of result or all bits of a 16-register result are zero
— Always cleared
— Set if bit 31 of accumulator or bit 15 of a 16-bit register was set prior to the execution
0001
P4
14
B1
of the instruction
B
13
P3
SR
Unch.
P2
12
MR
0
D2
DSP56800E Core Reference Manual
Logical Shift Right Word
P1
11
00AA
0302
B0
P0
10
D1
; divide B1 by 2 (B1 considered unsigned)
I1
9
Assembler Syntax:
LSR.W
I0
8
SZ
7
Unchanged
After Execution
6
L
B2
F
D0
5
E
U
4
CCR
0000
B1
N
3
D
SR
C
2
Z
Freescale Semiconductor
V
(no parallel move)
1
00AA
0305
C
0
B0
LSR.W