dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 322

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
JTAG and Enhanced On-Chip Emulation (Enhanced OnCE)
The second trigger block, shown in Figure 11-5, can be programmed for program fetches, or data memory
reads, writes, or accesses on 8, 16, or 32-bit data. It is also possible to mask bits in the second trigger block
to only examine desired bit fields.
11.4.3.2.2
The breakpoint unit contains a 16-bit counter which can be programmed to act in one of two different
modes. In triggering mode, the counter is used to count occurrences of a desired trigger condition. In
capture mode, the counter can instead independently count clock cycles or instructions executed between
two points of interest.
In capture mode, the breakpoint counter can also be cascaded with the step counter to create a 40-bit
counter for longer time measurements.
11-10
Read/Write
Read/Write
Fetch
Fetch
CDRB/CDBW
16-bit Counter
Memory Address
Multiplexer
XAB1
Memory Address
24
Multiplexer
PAB
Comparator
DSP56800E Core Reference Manual
24
Optional Inverter
PAB
Address Register
Figure 11-4. Trigger 1 Logic
Figure 11-5. Trigger 2 Logic
Breakpoint 2
Match 2
Comparator
Mask
Match 1
24
Address Register
Breakpoint 1
Mask Register
Breakpoint 2
24
JTAG
Core Peripheral Bus
Freescale Semiconductor
JTAG
Core Peripheral Bus
JTAG
Core Peripheral Bus

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