dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 514

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

LSRAC
Operation:
(S1 >> S2) + D →D (no parallel move)
Description: Logically shift the first 16-bit source operand (S1) to the right by the value contained in the lowest
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Note:
A-170
Before Execution
A2
0
4 bits of the second source operand (S2), and accumulate the result with the value in the destination
(D). Operand S1 is internally zero extended and concatenated with 16 zero bits to form a 36-bit value
before the shift operation. The result is not affected by the state of the saturation bit (SA).
This instruction is used for multi-precision logical right shifts.
LSRAC
Prior to execution, the Y1 register contains the value to be shifted ($C003), the lowest 4 bits of the X0
register contain the amount by which to shift ($4), and the destination accumulator contains
$0:0000:0099. The LSRAC instruction logically shifts the value $C003 by 4 bits to the right and ac-
cumulates this result with the value that is already in accumulator A.
N
Z
If the SA bit is set, the N bit is equal to bit 31 of the result; if SA is cleared, N is equal to bit 35 of the
result.
LF
15
— Set if bit 35 of accumulator result is set
— Set if accumulator result equals zero
C003
0000
A1
Y1
P4
14
Y1,X0,A
Logical Shift Right with Accumulate
13
P3
SR
X0
P2
12
MR
DSP56800E Core Reference Manual
P1
11
00F4
0099
8000
0300
A0
Y0
P0
10
; logical right shift Y1 by 4 and
; accumulate in A
I1
9
Assembler Syntax:
LSRAC
I0
8
SZ
7
After Execution
A2
6
L
0
5
E
S1,S2,D
U
0C00
C003
4
CCR
A1
Y1
N
3
SR
X0
2
Z
Freescale Semiconductor
V
(no parallel move)
1
3099
8000
00F4
0300
A0
Y0
C
0
LSRAC