dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 468

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

DIV
Usage:
Condition Codes Affected:
Example:
Explanation of Example:
A-124
Before Execution
A2
0
3. Calculate the next quotient bit and the new partial remainder. The 16-bit source operand (signed
The DIV iteration instruction can be used in one of several different division algorithms, depending on
the needs of an application. Section 5.3.4, “Division,” on page 5-21 shows the correct usage of this in-
struction for fractional and integer division routines, discusses in detail issues related to division, and
provides several examples. The division routine is greatly simplified if both operands are positive, or
if it is not necessary also to calculate a remainder.
L
V
C
DIV
This example shows only a single iteration of the division instruction. Please refer to Section 5.3.4,
“Division,” on page 5-21 for a complete description of a division algorithm.
divisor) is either added to or subtracted from the MSP of the destination accumulator (FF1 portion),
and the result is stored back into the MSP of the destination accumulator. If the result of the exclusive
OR operation in the first step was one (that is, the sign bits were different), the source operand S is
added to the accumulator. If the result of the exclusive OR operation was zero (that is, the sign bits
were the same), the source operand S is subtracted from the accumulator. Due to the automatic sign
extension of the 16-bit signed divisor, the addition or subtraction operation correctly sets the C bit
with the next quotient bit.
LF
15
— Set if overflow bit V is set
— Set if the MSB of the destination operand (bit 35 for an accumulator,
— Set if MSB of the result is zero (bit 35 for an accumulator,
0702
2000
P4
14
bit 35 after sign extension for the Y register) is changed as a result
of the instruction’s left shift operation; otherwise, V is cleared
bit 35 after sign extension for the Y register)
A1
Y1
Y0,A
13
P3
SR
P2
12
MR
DSP56800E Core Reference Manual
P1
11
0000
0004
0301
A0
Y0
P0
10
Divide Iteration
; divide A by Y0
I1
9
I0
8
SZ
7
After Execution
6
L
A2
0
5
E
U
4
CCR
0E00
2000
A1
Y1
N
3
SR
2
Z
Freescale Semiconductor
V
1
0001
0004
0301
C
0
A0
Y0
DIV